X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Flogodl.h;h=bb6f943aebb3475905a54ae4ceb5b00fdbf4fa2f;hb=cb5473205206c7f14cbb1e747f28ec75b48826e2;hp=c018b6b646b093cfe6d3bbbfc6bb2a0b82ddfc1e;hpb=52f52c1494eedaeacccad6e2331f4f638b48f5ab;p=u-boot diff --git a/include/configs/logodl.h b/include/configs/logodl.h index c018b6b646..bb6f943aeb 100644 --- a/include/configs/logodl.h +++ b/include/configs/logodl.h @@ -30,17 +30,11 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* - * If we are developing, we might want to start U-Boot from ram - * so we MUST NOT initialize critical regs like mem-timing ... - */ -#define CONFIG_INIT_CRITICAL /* undef for developing */ - /* * High Level Configuration Options * (easy to change) */ -#define CONFIG_PXA250 1 /* This is an PXA250 CPU */ +#define CONFIG_PXA250 1 /* This is an PXA250 CPU */ #define CONFIG_GEALOG 1 /* on a Logotronic GEALOG SG board */ #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ @@ -58,13 +52,28 @@ #define CONFIG_ENV_OVERWRITE #define CONFIG_BAUDRATE 19200 -/*#define CONFIG_MISC_INIT_R 1 / * we have a misc_init_r() function */ -#undef CONFIG_MISC_INIT_R /* FIXME */ +#undef CONFIG_MISC_INIT_R /* FIXME: misc_init_r() missing */ + + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + + +/* + * Command line configuration. + */ +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_ECHO +#define CONFIG_CMD_ENV +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_RUN -#define CONFIG_COMMANDS (CFG_CMD_FLASH|CFG_CMD_MEMORY|CFG_CMD_ENV|CFG_CMD_RUN|CFG_CMD_ASKENV|CFG_CMD_ECHO) -/* CONFIG_CMD_DFL|CFG_CMD_I2C|CFG_CMD_EEPROM|CFG_CMD_NET|CFG_CMD_JFFS2|CFG_CMD_DHCP) */ -/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ -#include #define CONFIG_BOOTDELAY 3 /* #define CONFIG_BOOTARGS "root=/dev/nfs ip=bootp console=ttyS0,19200" */ @@ -87,45 +96,47 @@ * used for the RAM copy of the uboot code * */ -#define CFG_MALLOC_LEN (256*1024) +#define CONFIG_SYS_MALLOC_LEN (256*1024) -#define CFG_LONGHELP /* undef to save memory */ -#define CFG_PROMPT "uboot> " /* Monitor Command Prompt */ -#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ -#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ -#define CFG_MAXARGS 16 /* max number of command args */ -#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "uboot> " /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#define CFG_MEMTEST_START 0x08000000 /* memtest works on */ -#define CFG_MEMTEST_END 0x0800ffff /* 64 KiB */ +#define CONFIG_SYS_MEMTEST_START 0x08000000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x0800ffff /* 64 KiB */ -#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ +#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ -#define CFG_LOAD_ADDR 0x08000000 /* load kernel to this address */ +#define CONFIG_SYS_LOAD_ADDR 0x08000000 /* load kernel to this address */ -#define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */ +#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ /* RS: the oscillator is actually 3680130?? */ -#define CFG_CPUSPEED 0x141 /* set core clock to 200/200/100 MHz */ +#define CONFIG_SYS_CPUSPEED 0x141 /* set core clock to 200/200/100 MHz */ /* 0101000001 */ /* ^^^^^ Memory Speed 99.53 MHz */ /* ^^ Run Mode Speed = 2x Mem Speed */ /* ^^ Turbo Mode Sp. = 1x Run M. Sp. */ -#define CFG_MONITOR_LEN 0x20000 /* 128 KiB */ +#define CONFIG_SYS_MONITOR_LEN 0x20000 /* 128 KiB */ - /* valid baudrates */ -#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + /* valid baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /* * SMSC91C111 Network Card */ -/*#define CONFIG_DRIVER_SMC91111 1 */ -/*#define CONFIG_SMC91111_BASE 0x10000000 / * chip select 4 */ -/*#undef CONFIG_SMC_USE_32_BIT / * 16 bit bus access */ -/*#undef CONFIG_SMC_91111_EXT_PHY / * we use internal phy */ -/*#undef CONFIG_SHOW_ACTIVITY */ -/*#define CONFIG_NET_RETRY_COUNT 10 / * # of retries */ +#if 0 +#define CONFIG_DRIVER_SMC91111 1 +#define CONFIG_SMC91111_BASE 0x10000000 /* chip select 4 */ +#undef CONFIG_SMC_USE_32_BIT /* 16 bit bus access */ +#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */ +#undef CONFIG_SHOW_ACTIVITY +#define CONFIG_NET_RETRY_COUNT 10 /* # of retries */ +#endif /* * Stack sizes @@ -149,10 +160,10 @@ #define PHYS_FLASH_2 0x01000000 /* Flash Bank #2 */ #define PHYS_FLASH_SIZE (32*1024*1024) /* 32 MB */ -#define CFG_DRAM_BASE PHYS_SDRAM_1 /* RAM starts here */ -#define CFG_DRAM_SIZE PHYS_SDRAM_1_SIZE +#define CONFIG_SYS_DRAM_BASE PHYS_SDRAM_1 /* RAM starts here */ +#define CONFIG_SYS_DRAM_SIZE PHYS_SDRAM_1_SIZE -#define CFG_FLASH_BASE PHYS_FLASH_1 +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 /* @@ -202,53 +213,53 @@ #define _BIT31 0x80000000 -#define CFG_LED_A_BIT (_BIT18) -#define CFG_LED_A_SR GPSR0 -#define CFG_LED_A_CR GPCR0 +#define CONFIG_SYS_LED_A_BIT (_BIT18) +#define CONFIG_SYS_LED_A_SR GPSR0 +#define CONFIG_SYS_LED_A_CR GPCR0 -#define CFG_LED_B_BIT (_BIT16) -#define CFG_LED_B_SR GPSR1 -#define CFG_LED_B_CR GPCR1 +#define CONFIG_SYS_LED_B_BIT (_BIT16) +#define CONFIG_SYS_LED_B_SR GPSR1 +#define CONFIG_SYS_LED_B_CR GPCR1 /* LED A: off, LED B: off */ -#define CFG_GPSR0_VAL (_BIT1+_BIT6+_BIT8+_BIT9+_BIT11+_BIT15+_BIT16+_BIT18) -#define CFG_GPSR1_VAL (_BIT0+_BIT1+_BIT16+_BIT24+_BIT25 +_BIT7+_BIT8+_BIT9+_BIT11+_BIT13) -#define CFG_GPSR2_VAL (_BIT14+_BIT15+_BIT16) - -#define CFG_GPCR0_VAL 0x00000000 -#define CFG_GPCR1_VAL 0x00000000 -#define CFG_GPCR2_VAL 0x00000000 - -#define CFG_GPDR0_VAL (_BIT1+_BIT6+_BIT8+_BIT9+_BIT11+_BIT15+_BIT16+_BIT17+_BIT18) -#define CFG_GPDR1_VAL (_BIT0+_BIT1+_BIT16+_BIT24+_BIT25 +_BIT7+_BIT8+_BIT9+_BIT11+_BIT13) -#define CFG_GPDR2_VAL (_BIT14+_BIT15+_BIT16) - -#define CFG_GAFR0_L_VAL (_BIT22+_BIT24+_BIT31) -#define CFG_GAFR0_U_VAL (_BIT15+_BIT17+_BIT19+\ - _BIT20+_BIT22+_BIT24+_BIT26+_BIT29+_BIT31) -#define CFG_GAFR1_L_VAL (_BIT3+_BIT4+_BIT6+_BIT8+_BIT10+_BIT12+_BIT15+_BIT17+_BIT19+\ - _BIT20+_BIT23+_BIT24+_BIT27+_BIT28+_BIT31) -#define CFG_GAFR1_U_VAL (_BIT21+_BIT23+_BIT25+_BIT27+_BIT29+_BIT31) -#define CFG_GAFR2_L_VAL (_BIT1+_BIT3+_BIT5+_BIT7+_BIT9+_BIT11+_BIT13+_BIT15+_BIT17+\ - _BIT19+_BIT21+_BIT23+_BIT25+_BIT27+_BIT29+_BIT31) -#define CFG_GAFR2_U_VAL (_BIT1) - -#define CFG_PSSR_VAL (0x20) +#define CONFIG_SYS_GPSR0_VAL (_BIT1+_BIT6+_BIT8+_BIT9+_BIT11+_BIT15+_BIT16+_BIT18) +#define CONFIG_SYS_GPSR1_VAL (_BIT0+_BIT1+_BIT16+_BIT24+_BIT25 +_BIT7+_BIT8+_BIT9+_BIT11+_BIT13) +#define CONFIG_SYS_GPSR2_VAL (_BIT14+_BIT15+_BIT16) + +#define CONFIG_SYS_GPCR0_VAL 0x00000000 +#define CONFIG_SYS_GPCR1_VAL 0x00000000 +#define CONFIG_SYS_GPCR2_VAL 0x00000000 + +#define CONFIG_SYS_GPDR0_VAL (_BIT1+_BIT6+_BIT8+_BIT9+_BIT11+_BIT15+_BIT16+_BIT17+_BIT18) +#define CONFIG_SYS_GPDR1_VAL (_BIT0+_BIT1+_BIT16+_BIT24+_BIT25 +_BIT7+_BIT8+_BIT9+_BIT11+_BIT13) +#define CONFIG_SYS_GPDR2_VAL (_BIT14+_BIT15+_BIT16) + +#define CONFIG_SYS_GAFR0_L_VAL (_BIT22+_BIT24+_BIT31) +#define CONFIG_SYS_GAFR0_U_VAL (_BIT15+_BIT17+_BIT19+\ + _BIT20+_BIT22+_BIT24+_BIT26+_BIT29+_BIT31) +#define CONFIG_SYS_GAFR1_L_VAL (_BIT3+_BIT4+_BIT6+_BIT8+_BIT10+_BIT12+_BIT15+_BIT17+_BIT19+\ + _BIT20+_BIT23+_BIT24+_BIT27+_BIT28+_BIT31) +#define CONFIG_SYS_GAFR1_U_VAL (_BIT21+_BIT23+_BIT25+_BIT27+_BIT29+_BIT31) +#define CONFIG_SYS_GAFR2_L_VAL (_BIT1+_BIT3+_BIT5+_BIT7+_BIT9+_BIT11+_BIT13+_BIT15+_BIT17+\ + _BIT19+_BIT21+_BIT23+_BIT25+_BIT27+_BIT29+_BIT31) +#define CONFIG_SYS_GAFR2_U_VAL (_BIT1) + +#define CONFIG_SYS_PSSR_VAL (0x20) /* * Memory settings */ -#define CFG_MSC0_VAL 0x123c2980 -#define CFG_MSC1_VAL 0x123c2661 -#define CFG_MSC2_VAL 0x7ff87ff8 +#define CONFIG_SYS_MSC0_VAL 0x123c2980 +#define CONFIG_SYS_MSC1_VAL 0x123c2661 +#define CONFIG_SYS_MSC2_VAL 0x7ff87ff8 /* no sdram/pcmcia here */ -#define CFG_MDCNFG_VAL 0x00000000 -#define CFG_MDREFR_VAL 0x00000000 -#define CFG_MDREFR_VAL_100 0x00000000 -#define CFG_MDMRS_VAL 0x00000000 +#define CONFIG_SYS_MDCNFG_VAL 0x00000000 +#define CONFIG_SYS_MDREFR_VAL 0x00000000 +#define CONFIG_SYS_MDREFR_VAL_100 0x00000000 +#define CONFIG_SYS_MDMRS_VAL 0x00000000 /* only SRAM */ #define SXCNFG_SETTINGS 0x00000000 @@ -257,29 +268,28 @@ * PCMCIA and CF Interfaces */ -#define CFG_MECR_VAL 0x00000000 -#define CFG_MCMEM0_VAL 0x00010504 -#define CFG_MCMEM1_VAL 0x00010504 -#define CFG_MCATT0_VAL 0x00010504 -#define CFG_MCATT1_VAL 0x00010504 -#define CFG_MCIO0_VAL 0x00004715 -#define CFG_MCIO1_VAL 0x00004715 +#define CONFIG_SYS_MECR_VAL 0x00000000 +#define CONFIG_SYS_MCMEM0_VAL 0x00010504 +#define CONFIG_SYS_MCMEM1_VAL 0x00010504 +#define CONFIG_SYS_MCATT0_VAL 0x00010504 +#define CONFIG_SYS_MCATT1_VAL 0x00010504 +#define CONFIG_SYS_MCIO0_VAL 0x00004715 +#define CONFIG_SYS_MCIO1_VAL 0x00004715 /* * FLASH and environment organization */ -#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ -#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ +#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ /* timeout values are in ticks */ -#define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */ -#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ +#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */ /* FIXME */ -#define CFG_ENV_IS_IN_FLASH 1 -#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */ -#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */ +#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ #endif /* __CONFIG_H */ -