X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fls1021atwr.h;h=cf23c33d857ddd36ab100b4c7b6261589c08bae4;hb=c960ef29cd1bffccb84366cc6ca9c290cb3c36a0;hp=81f38a30a473c5447010bb4aaceb8d4c7181da9a;hpb=4125bbcef6a998ce8580a1f5c53c8c93a56a125b;p=u-boot diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 81f38a30a4..cf23c33d85 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -1,7 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2014 Freescale Semiconductor, Inc. - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -24,35 +23,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE -/* - * USB - */ - -/* - * EHCI Support - disbaled by default as - * there is no signal coming out of soc on - * this board for this controller. However, - * the silicon still has this controller, - * and anyone can use this controller by - * taking signals out on their board. - */ - -/*#define CONFIG_HAS_FSL_DR_USB*/ - -#ifdef CONFIG_HAS_FSL_DR_USB -#define CONFIG_USB_EHCI_FSL -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET -#endif - -/* XHCI Support - enabled by default */ -#define CONFIG_HAS_FSL_XHCI_USB - -#ifdef CONFIG_HAS_FSL_XHCI_USB -#define CONFIG_USB_XHCI_FSL -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 -#endif - #define CONFIG_SYS_CLK_FREQ 100000000 #define CONFIG_DDR_CLK_FREQ 100000000 @@ -95,8 +65,6 @@ #define CONFIG_SYS_FSL_PBL_RCW \ board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg #endif -#define CONFIG_SPL_FRAMEWORK -#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" #ifdef CONFIG_SECURE_BOOT /* @@ -110,7 +78,6 @@ #define CONFIG_SPL_MAX_SIZE 0x1a000 #define CONFIG_SPL_STACK 0x1001d000 #define CONFIG_SPL_PAD_TO 0x1c000 -#define CONFIG_SYS_TEXT_BASE 0x82000000 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \ CONFIG_SYS_MONITOR_LEN) @@ -131,14 +98,6 @@ #endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */ #endif -#ifdef CONFIG_QSPI_BOOT -#define CONFIG_SYS_TEXT_BASE 0x40010000 -#endif - -#ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0x60100000 -#endif - #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) @@ -149,6 +108,7 @@ #if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \ !defined(CONFIG_QSPI_BOOT) #define CONFIG_U_QE +#define CONFIG_SYS_QE_FMAN_FW_IN_NOR #endif /* @@ -248,7 +208,6 @@ #ifdef CONFIG_LPUART #define CONFIG_LPUART_32B_REG #else -#define CONFIG_CONS_INDEX 1 #define CONFIG_SYS_NS16550_SERIAL #ifndef CONFIG_DM_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 @@ -277,7 +236,6 @@ /* * MMC */ -#define CONFIG_FSL_ESDHC /* SPI */ #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) @@ -309,7 +267,6 @@ /* * eTSEC */ -#define CONFIG_TSEC_ENET #ifdef CONFIG_TSEC_ENET #define CONFIG_MII @@ -335,8 +292,6 @@ #define CONFIG_ETHPRIME "eTSEC1" -#define CONFIG_PHY_GIGE -#define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS #define CONFIG_HAS_ETH0 @@ -350,11 +305,9 @@ #ifdef CONFIG_PCI #define CONFIG_PCI_SCAN_SHOW -#define CONFIG_CMD_PCI #endif #define CONFIG_CMDLINE_TAG -#define CONFIG_CMDLINE_EDITING #define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_LAYERSCAPE_NS_ACCESS @@ -366,29 +319,152 @@ #define CONFIG_FSL_DEVICE_DISABLE +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(USB, usb, 0) +#include #ifdef CONFIG_LPUART #define CONFIG_EXTRA_ENV_SETTINGS \ "bootargs=root=/dev/ram0 rw console=ttyLP0,115200\0" \ "initrd_high=0xffffffff\0" \ - "fdt_high=0xffffffff\0" + "fdt_high=0xffffffff\0" \ + "fdt_addr=0x64f00000\0" \ + "kernel_addr=0x65000000\0" \ + "scriptaddr=0x80000000\0" \ + "scripthdraddr=0x80080000\0" \ + "fdtheader_addr_r=0x80100000\0" \ + "kernelheader_addr_r=0x80200000\0" \ + "kernel_addr_r=0x81000000\0" \ + "fdt_addr_r=0x90000000\0" \ + "ramdisk_addr_r=0xa0000000\0" \ + "load_addr=0xa0000000\0" \ + "kernel_size=0x2800000\0" \ + "kernel_addr_sd=0x8000\0" \ + "kernel_size_sd=0x14000\0" \ + BOOTENV \ + "boot_scripts=ls1021atwr_boot.scr\0" \ + "boot_script_hdr=hdr_ls1021atwr_bs.out\0" \ + "scan_dev_for_boot_part=" \ + "part list ${devtype} ${devnum} devplist; " \ + "env exists devplist || setenv devplist 1; " \ + "for distro_bootpart in ${devplist}; do " \ + "if fstype ${devtype} " \ + "${devnum}:${distro_bootpart} " \ + "bootfstype; then " \ + "run scan_dev_for_boot; " \ + "fi; " \ + "done\0" \ + "scan_dev_for_boot=" \ + "echo Scanning ${devtype} " \ + "${devnum}:${distro_bootpart}...; " \ + "for prefix in ${boot_prefixes}; do " \ + "run scan_dev_for_scripts; " \ + "done;" \ + "\0" \ + "boot_a_script=" \ + "load ${devtype} ${devnum}:${distro_bootpart} " \ + "${scriptaddr} ${prefix}${script}; " \ + "env exists secureboot && load ${devtype} " \ + "${devnum}:${distro_bootpart} " \ + "${scripthdraddr} ${prefix}${boot_script_hdr} " \ + "&& esbc_validate ${scripthdraddr};" \ + "source ${scriptaddr}\0" \ + "installer=load mmc 0:2 $load_addr " \ + "/flex_installer_arm32.itb; " \ + "bootm $load_addr#ls1021atwr\0" \ + "qspi_bootcmd=echo Trying load from qspi..;" \ + "sf probe && sf read $load_addr " \ + "$kernel_addr $kernel_size && bootm $load_addr#$board\0" \ + "nor_bootcmd=echo Trying load from nor..;" \ + "cp.b $kernel_addr $load_addr " \ + "$kernel_size && bootm $load_addr#$board\0" #else #define CONFIG_EXTRA_ENV_SETTINGS \ "bootargs=root=/dev/ram0 rw console=ttyS0,115200\0" \ "initrd_high=0xffffffff\0" \ - "fdt_high=0xffffffff\0" + "fdt_high=0xffffffff\0" \ + "fdt_addr=0x64f00000\0" \ + "kernel_addr=0x61000000\0" \ + "kernelheader_addr=0x60800000\0" \ + "scriptaddr=0x80000000\0" \ + "scripthdraddr=0x80080000\0" \ + "fdtheader_addr_r=0x80100000\0" \ + "kernelheader_addr_r=0x80200000\0" \ + "kernel_addr_r=0x81000000\0" \ + "kernelheader_size=0x40000\0" \ + "fdt_addr_r=0x90000000\0" \ + "ramdisk_addr_r=0xa0000000\0" \ + "load_addr=0xa0000000\0" \ + "kernel_size=0x2800000\0" \ + "kernel_addr_sd=0x8000\0" \ + "kernel_size_sd=0x14000\0" \ + "kernelhdr_addr_sd=0x4000\0" \ + "kernelhdr_size_sd=0x10\0" \ + BOOTENV \ + "boot_scripts=ls1021atwr_boot.scr\0" \ + "boot_script_hdr=hdr_ls1021atwr_bs.out\0" \ + "scan_dev_for_boot_part=" \ + "part list ${devtype} ${devnum} devplist; " \ + "env exists devplist || setenv devplist 1; " \ + "for distro_bootpart in ${devplist}; do " \ + "if fstype ${devtype} " \ + "${devnum}:${distro_bootpart} " \ + "bootfstype; then " \ + "run scan_dev_for_boot; " \ + "fi; " \ + "done\0" \ + "scan_dev_for_boot=" \ + "echo Scanning ${devtype} " \ + "${devnum}:${distro_bootpart}...; " \ + "for prefix in ${boot_prefixes}; do " \ + "run scan_dev_for_scripts; " \ + "done;" \ + "\0" \ + "boot_a_script=" \ + "load ${devtype} ${devnum}:${distro_bootpart} " \ + "${scriptaddr} ${prefix}${script}; " \ + "env exists secureboot && load ${devtype} " \ + "${devnum}:${distro_bootpart} " \ + "${scripthdraddr} ${prefix}${boot_script_hdr} " \ + "&& esbc_validate ${scripthdraddr};" \ + "source ${scriptaddr}\0" \ + "qspi_bootcmd=echo Trying load from qspi..;" \ + "sf probe && sf read $load_addr " \ + "$kernel_addr $kernel_size; env exists secureboot " \ + "&& sf read $kernelheader_addr_r $kernelheader_addr " \ + "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ + "bootm $load_addr#$board\0" \ + "nor_bootcmd=echo Trying load from nor..;" \ + "cp.b $kernel_addr $load_addr " \ + "$kernel_size; env exists secureboot " \ + "&& cp.b $kernelheader_addr $kernelheader_addr_r " \ + "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ + "bootm $load_addr#$board\0" \ + "sd_bootcmd=echo Trying load from SD ..;" \ + "mmcinfo && mmc read $load_addr " \ + "$kernel_addr_sd $kernel_size_sd && " \ + "env exists secureboot && mmc read $kernelheader_addr_r " \ + "$kernelhdr_addr_sd $kernelhdr_size_sd " \ + " && esbc_validate ${kernelheader_addr_r};" \ + "bootm $load_addr#$board\0" +#endif + +#undef CONFIG_BOOTCOMMAND +#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) +#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd" \ + "env exists secureboot && esbc_halt" +#elif defined(CONFIG_SD_BOOT) +#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \ + "env exists secureboot && esbc_halt;" +#else +#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd;" \ + "env exists secureboot && esbc_halt;" #endif /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_AUTO_COMPLETE -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE \ - (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END 0x9fffffff @@ -408,7 +484,7 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #endif -#define CONFIG_SYS_QE_FW_ADDR 0x600c0000 +#define CONFIG_SYS_QE_FW_ADDR 0x60940000 /* * Environment @@ -416,30 +492,21 @@ #define CONFIG_ENV_OVERWRITE #if defined(CONFIG_SD_BOOT) -#define CONFIG_ENV_OFFSET 0x100000 -#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_ENV_OFFSET 0x300000 #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE 0x20000 #elif defined(CONFIG_QSPI_BOOT) -#define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_OFFSET 0x100000 +#define CONFIG_ENV_OFFSET 0x300000 #define CONFIG_ENV_SECT_SIZE 0x10000 #else -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000) #define CONFIG_ENV_SIZE 0x20000 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ #endif #define CONFIG_MISC_INIT_R -/* Hash command with SHA acceleration supported in hardware */ -#ifdef CONFIG_FSL_CAAM -#define CONFIG_CMD_HASH -#define CONFIG_SHA_HW_ACCEL -#endif - #include #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */