X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fls1043a_common.h;h=1faed4e69a5593aade99623258065e8df271ad9c;hb=44ab2d325b79d3ce6123495c5ce52410655a58fb;hp=e26924877d10b55d72e0dc9e50032cf48edd9996;hpb=4f66e09bb9fbc47b73f67c3cc08ee2663e8fcdb1;p=u-boot diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index e26924877d..1faed4e69a 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -1,7 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2015 Freescale Semiconductor - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __LS1043A_COMMON_H @@ -22,7 +21,7 @@ #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT)) #define SPL_NO_MMC #endif -#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT)) +#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT_QSPI)) #define SPL_NO_IFC #endif @@ -37,8 +36,6 @@ /* Link Definitions */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0) -#define CONFIG_SUPPORT_RAW_INITRD - #define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_VERY_BIG_RAM @@ -56,7 +53,6 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) /* Serial Port */ -#define CONFIG_CONS_INDEX 1 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK (get_serial_clock()) @@ -65,8 +61,6 @@ /* SD boot SPL */ #ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_FRAMEWORK -#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TEXT_BASE 0x10000000 @@ -74,10 +68,10 @@ #define CONFIG_SPL_STACK 0x1001e000 #define CONFIG_SPL_PAD_TO 0x1d000 -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \ - CONFIG_SYS_MONITOR_LEN) +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ + CONFIG_SPL_BSS_MAX_SIZE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 -#define CONFIG_SPL_BSS_START_ADDR 0x80100000 +#define CONFIG_SPL_BSS_START_ADDR 0x8f000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #ifdef CONFIG_SECURE_BOOT @@ -97,8 +91,6 @@ /* NAND SPL */ #ifdef CONFIG_NAND_BOOT #define CONFIG_SPL_PBL_PAD -#define CONFIG_SPL_FRAMEWORK -#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TEXT_BASE 0x10000000 #define CONFIG_SPL_MAX_SIZE 0x1a000 @@ -154,11 +146,6 @@ /* I2C */ #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 -#define CONFIG_SYS_I2C_MXC_I2C2 -#define CONFIG_SYS_I2C_MXC_I2C3 -#define CONFIG_SYS_I2C_MXC_I2C4 /* PCIe */ #ifndef SPL_NO_PCIE @@ -167,21 +154,15 @@ #define CONFIG_PCIE3 /* PCIE controller 3 */ #ifdef CONFIG_PCI -#define CONFIG_NET_MULTI #define CONFIG_PCI_SCAN_SHOW -#define CONFIG_CMD_PCI #endif #endif /* Command line configuration */ -#ifndef SPL_NO_ENV -#define CONFIG_CMD_ENV -#endif /* MMC */ #ifndef SPL_NO_MMC #ifdef CONFIG_MMC -#define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #endif #endif @@ -208,20 +189,21 @@ #define CONFIG_SYS_FM_MURAM_SIZE 0x60000 #ifdef CONFIG_NAND_BOOT -/* Store Fman ucode at offeset 0x160000(11 blocks). */ +/* Store Fman ucode at offeset 0x900000(72 blocks). */ #define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_FMAN_FW_ADDR (11 * CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_SYS_FMAN_FW_ADDR (72 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SD_BOOT) /* * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is * about 1MB (2040 blocks), Env is stored after the image, and the env size is - * 0x2000 (16 blocks), 8 + 2040 + 16 = 2064, enlarge it to 2080(0x820). + * 0x2000 (16 blocks), 8 + 2040 + 16 = 2064, enlarge it to 18432(0x4800). */ #define CONFIG_SYS_QE_FMAN_FW_IN_MMC -#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820) +#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x4800) +#define CONFIG_SYS_QE_FW_ADDR (512 * 0x4a08) #elif defined(CONFIG_QSPI_BOOT) #define CONFIG_SYS_QE_FW_IN_SPIFLASH -#define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000 +#define CONFIG_SYS_FMAN_FW_ADDR 0x40900000 #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 #define CONFIG_ENV_SPI_MAX_HZ 1000000 @@ -229,7 +211,8 @@ #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR /* FMan fireware Pre-load address */ -#define CONFIG_SYS_FMAN_FW_ADDR 0x60300000 +#define CONFIG_SYS_FMAN_FW_ADDR 0x60900000 +#define CONFIG_SYS_QE_FW_ADDR 0x60940000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) @@ -243,68 +226,105 @@ #define HWCONFIG_BUFFER_SIZE 128 #ifndef SPL_NO_MISC -#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) -#define MTDPARTS_DEFAULT "mtdparts=spi0.0:1m(uboot)," \ - "5m(kernel),1m(dtb),9m(file_system)" -#else -#define MTDPARTS_DEFAULT "mtdparts=60000000.nor:" \ - "2m@0x100000(nor_bank0_uboot),"\ - "40m@0x1100000(nor_bank0_fit)," \ - "7m(nor_bank0_user)," \ - "2m@0x4100000(nor_bank4_uboot)," \ - "40m@0x5100000(nor_bank4_fit),"\ - "-(nor_bank4_user);" \ - "7e800000.flash:" \ - "1m(nand_uboot),1m(nand_uboot_env)," \ - "20m(nand_fit);spi0.0:1m(uboot)," \ - "5m(kernel),1m(dtb),9m(file_system)" +#ifndef CONFIG_SPL_BUILD +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(USB, usb, 0) +#include #endif /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ - "loadaddr=0x80100000\0" \ "fdt_high=0xffffffffffffffff\0" \ "initrd_high=0xffffffffffffffff\0" \ - "kernel_start=0x61100000\0" \ - "kernel_load=0xa0000000\0" \ + "fdt_addr=0x64f00000\0" \ + "kernel_addr=0x61000000\0" \ + "scriptaddr=0x80000000\0" \ + "scripthdraddr=0x80080000\0" \ + "fdtheader_addr_r=0x80100000\0" \ + "kernelheader_addr_r=0x80200000\0" \ + "kernel_addr_r=0x81000000\0" \ + "fdt_addr_r=0x90000000\0" \ + "load_addr=0xa0000000\0" \ + "kernelheader_addr=0x60800000\0" \ "kernel_size=0x2800000\0" \ - "console=ttyS0,115200\0" \ - "mtdparts=" MTDPARTS_DEFAULT "\0" - -#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \ - "earlycon=uart8250,mmio,0x21c0500 " \ - MTDPARTS_DEFAULT - + "kernelheader_size=0x40000\0" \ + "kernel_addr_sd=0x8000\0" \ + "kernel_size_sd=0x14000\0" \ + "kernelhdr_addr_sd=0x4000\0" \ + "kernelhdr_size_sd=0x10\0" \ + "console=ttyS0,115200\0" \ + "boot_os=y\0" \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ + BOOTENV \ + "boot_scripts=ls1043ardb_boot.scr\0" \ + "boot_script_hdr=hdr_ls1043ardb_bs.out\0" \ + "scan_dev_for_boot_part=" \ + "part list ${devtype} ${devnum} devplist; " \ + "env exists devplist || setenv devplist 1; " \ + "for distro_bootpart in ${devplist}; do " \ + "if fstype ${devtype} " \ + "${devnum}:${distro_bootpart} " \ + "bootfstype; then " \ + "run scan_dev_for_boot; " \ + "fi; " \ + "done\0" \ + "scan_dev_for_boot=" \ + "echo Scanning ${devtype} " \ + "${devnum}:${distro_bootpart}...; " \ + "for prefix in ${boot_prefixes}; do " \ + "run scan_dev_for_scripts; " \ + "done;\0" \ + "boot_a_script=" \ + "load ${devtype} ${devnum}:${distro_bootpart} " \ + "${scriptaddr} ${prefix}${script}; " \ + "env exists secureboot && load ${devtype} " \ + "${devnum}:${distro_bootpart} " \ + "${scripthdraddr} ${prefix}${boot_script_hdr} " \ + "&& esbc_validate ${scripthdraddr};" \ + "source ${scriptaddr}\0" \ + "qspi_bootcmd=echo Trying load from qspi..;" \ + "sf probe && sf read $load_addr " \ + "$kernel_addr $kernel_size; env exists secureboot " \ + "&& sf read $kernelheader_addr_r $kernelheader_addr " \ + "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ + "bootm $load_addr#$board\0" \ + "nor_bootcmd=echo Trying load from nor..;" \ + "cp.b $kernel_addr $load_addr " \ + "$kernel_size; env exists secureboot " \ + "&& cp.b $kernelheader_addr $kernelheader_addr_r " \ + "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ + "bootm $load_addr#$board\0" \ + "sd_bootcmd=echo Trying load from SD ..;" \ + "mmcinfo; mmc read $load_addr " \ + "$kernel_addr_sd $kernel_size_sd && " \ + "env exists secureboot && mmc read $kernelheader_addr_r " \ + "$kernelhdr_addr_sd $kernelhdr_size_sd " \ + " && esbc_validate ${kernelheader_addr_r};" \ + "bootm $load_addr#$board\0" + + +#undef CONFIG_BOOTCOMMAND #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_BOOTCOMMAND "sf probe && sf read $kernel_load " \ - "e0000 f00000 && bootm $kernel_load" +#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \ + "env exists secureboot && esbc_halt;" +#elif defined(CONFIG_SD_BOOT) +#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \ + "env exists secureboot && esbc_halt;" #else -#define CONFIG_BOOTCOMMAND "cp.b $kernel_start $kernel_load " \ - "$kernel_size && bootm $kernel_load" +#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \ + "env exists secureboot && esbc_halt;" #endif #endif /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ -#define CONFIG_SYS_LONGHELP - -#ifndef SPL_NO_MISC -#define CONFIG_CMDLINE_EDITING 1 -#endif -#define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_MAXARGS 64 /* max command args */ #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ -/* Hash command with SHA acceleration supported in hardware */ -#ifdef CONFIG_FSL_CAAM -#define CONFIG_CMD_HASH -#define CONFIG_SHA_HW_ACCEL -#endif +#include #endif /* __LS1043A_COMMON_H */