X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fls1043aqds.h;h=ee8cb2336cfef34d985766d397bbdf567f9ca421;hb=2ae9fbe00f71b8e48a04a13a71a9f6b42b70f158;hp=4929d981f175e7c6312abf58688508d8fd4252af;hpb=ef6c55a240a0ce303617cde81b08ac96f56a89d7;p=u-boot diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 4929d981f1..ee8cb2336c 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -14,6 +14,8 @@ #if defined(CONFIG_NAND_BOOT) || defined(CONFIG_SD_BOOT) #define CONFIG_SYS_TEXT_BASE 0x82000000 +#elif defined(CONFIG_QSPI_BOOT) +#define CONFIG_SYS_TEXT_BASE 0x40010000 #else #define CONFIG_SYS_TEXT_BASE 0x60100000 #endif @@ -23,8 +25,8 @@ unsigned long get_board_sys_clk(void); unsigned long get_board_ddr_clk(void); #endif -#define CONFIG_SYS_CLK_FREQ 100000000 -#define CONFIG_DDR_CLK_FREQ 100000000 +#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() +#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk() #define CONFIG_SKIP_LOWLEVEL_INIT @@ -85,19 +87,36 @@ unsigned long get_board_ddr_clk(void); #endif #ifdef CONFIG_SD_BOOT +#ifdef CONFIG_SD_BOOT_QSPI +#define CONFIG_SYS_FSL_PBL_RCW \ + board/freescale/ls1043aqds/ls1043aqds_rcw_sd_qspi.cfg +#else #define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1043aqds/ls1043aqds_rcw_sd_ifc.cfg #endif +#endif + +/* LPUART */ +#ifdef CONFIG_LPUART +#define CONFIG_LPUART_32B_REG +#endif /* SATA */ #define CONFIG_LIBATA #define CONFIG_SCSI_AHCI #define CONFIG_SCSI_AHCI_PLAT -#define CONFIG_CMD_SCSI -#define CONFIG_CMD_FAT -#define CONFIG_CMD_EXT2 +#define CONFIG_SCSI #define CONFIG_DOS_PARTITION #define CONFIG_BOARD_LATE_INIT +/* EEPROM */ +#define CONFIG_ID_EEPROM +#define CONFIG_SYS_I2C_EEPROM_NXID +#define CONFIG_SYS_EEPROM_BUS_NUM 0 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 + #define CONFIG_SYS_SATA AHCI_BASE_ADDR #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 @@ -108,6 +127,7 @@ unsigned long get_board_ddr_clk(void); /* * IFC Definitions */ +#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) #define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ CSPR_PORT_SIZE_16 | \ @@ -135,7 +155,7 @@ unsigned long get_board_ddr_clk(void); FTIM2_NOR_TWP(0x1c)) #define CONFIG_SYS_NOR_FTIM3 0 -#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ @@ -191,6 +211,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_CMD_NAND #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) +#endif #ifdef CONFIG_NAND_BOOT #define CONFIG_SPL_PAD_TO 0x20000 /* block aligned */ @@ -198,6 +219,12 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_NAND_U_BOOT_SIZE (640 << 10) #endif +#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) +#define CONFIG_QIXIS_I2C_ACCESS +#define CONFIG_SYS_I2C_EARLY_INIT +#define CONFIG_SYS_NO_FLASH +#endif + /* * QIXIS Definitions */ @@ -214,8 +241,11 @@ unsigned long get_board_ddr_clk(void); #define QIXIS_LBMAP_ALTBANK 0x04 #define QIXIS_LBMAP_NAND 0x09 #define QIXIS_LBMAP_SD 0x00 +#define QIXIS_LBMAP_SD_QSPI 0xff +#define QIXIS_LBMAP_QSPI 0xff #define QIXIS_RCW_SRC_NAND 0x106 #define QIXIS_RCW_SRC_SD 0x040 +#define QIXIS_RCW_SRC_QSPI 0x045 #define QIXIS_RST_CTL_RESET 0x41 #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 #define QIXIS_RCFG_CTL_RECONFIG_START 0x21 @@ -342,22 +372,35 @@ unsigned long get_board_ddr_clk(void); #define VDD_MV_MIN 819 #define VDD_MV_MAX 1212 +/* QSPI device */ +#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) +#define CONFIG_FSL_QSPI +#ifdef CONFIG_FSL_QSPI +#define CONFIG_SPI_FLASH_SPANSION +#define FSL_QSPI_FLASH_SIZE (1 << 24) +#define FSL_QSPI_FLASH_NUM 2 +#endif +#endif + +/* USB */ +#define CONFIG_HAS_FSL_XHCI_USB +#ifdef CONFIG_HAS_FSL_XHCI_USB +#define CONFIG_USB_XHCI_FSL +#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 +#define CONFIG_USB_STORAGE +#endif + /* * Miscellaneous configurable options */ #define CONFIG_MISC_INIT_R #define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#define CONFIG_SYS_PROMPT "=> " #define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_PBSIZE \ (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_CMD_GREPENV -#define CONFIG_CMD_MEMINFO -#define CONFIG_CMD_MEMTEST #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END 0x9fffffff @@ -392,6 +435,11 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE 0x2000 +#elif defined(CONFIG_QSPI_BOOT) +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SIZE 0x2000 /* 8KB */ +#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ +#define CONFIG_ENV_SECT_SIZE 0x10000 #else #define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x200000) @@ -399,10 +447,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_ENV_SIZE 0x20000 #endif -#define CONFIG_OF_LIBFDT -#define CONFIG_OF_BOARD_SETUP -#define CONFIG_CMD_BOOTZ -#define CONFIG_CMD_MII #define CONFIG_CMDLINE_TAG #include