X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fls2080aqds.h;h=838568fd216ca52ecfa050f8aa13df7a57f9246f;hb=2d221489df021393654805536be7effcb9d39702;hp=df1455bef34297585968095cc2317d1af3bd764b;hpb=672a45e828039c20e5165af95623554bdc31862d;p=u-boot

diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index df1455bef3..838568fd21 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -9,8 +9,6 @@
 
 #include "ls2080a_common.h"
 
-#define CONFIG_DISPLAY_BOARDINFO
-
 #ifndef __ASSEMBLY__
 unsigned long get_board_sys_clk(void);
 unsigned long get_board_ddr_clk(void);
@@ -349,11 +347,9 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
 
 #define CONFIG_FSL_MEMAC
-#define CONFIG_PCI		/* Enable PCIE */
 #define CONFIG_PCIE_LAYERSCAPE	/* Use common FSL Layerscape PCIe code */
 
 #ifdef CONFIG_PCI
-#define CONFIG_PCI_PNP
 #define CONFIG_PCI_SCAN_SHOW
 #define CONFIG_CMD_PCI
 #endif
@@ -425,7 +421,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_MAX_CONTROLLER_COUNT		2
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	2
-#define CONFIG_USB_STORAGE
 
 #include <asm/fsl_secure_boot.h>