X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Flwmon.h;h=e23b0a1b2f25d0a75b1135c8f8ef34e6c60915db;hb=7985f7e3ff51ad8024d69a209893f68a2a5d3983;hp=be20d729095774717531a9bad1f6cee8de3809cf;hpb=b3ab9dfd497e19c0f92f21a420d323a978e5f863;p=u-boot

diff --git a/include/configs/lwmon.h b/include/configs/lwmon.h
index be20d72909..e23b0a1b2f 100644
--- a/include/configs/lwmon.h
+++ b/include/configs/lwmon.h
@@ -39,6 +39,8 @@
 #define CONFIG_MPC823		1	/* This is a MPC823E CPU	*/
 #define CONFIG_LWMON		1	/* ...on a LWMON board		*/
 
+#define	CONFIG_SYS_TEXT_BASE	0x40000000
+
 /* Default Ethernet MAC address */
 #define CONFIG_ETHADDR          00:11:B0:00:00:00
 
@@ -273,9 +275,8 @@
  * Definitions for initial stack pointer and data area (in DPRAM)
  */
 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_IMMR
-#define CONFIG_SYS_INIT_RAM_END	0x2F00	/* End of used area in DPRAM	*/
-#define CONFIG_SYS_GBL_DATA_SIZE	68  /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE	0x2F00	/* Size of used area in DPRAM	*/
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
 /*-----------------------------------------------------------------------
@@ -347,32 +348,32 @@
 
 /* List of I2C addresses to be verified by POST */
 #ifdef CONFIG_USE_FRAM
-#define I2C_ADDR_LIST	{  /*	CONFIG_SYS_I2C_AUDIO_ADDR, */	\
-				CONFIG_SYS_I2C_SYSMON_ADDR,	\
-				CONFIG_SYS_I2C_RTC_ADDR,	\
-				CONFIG_SYS_I2C_POWER_A_ADDR,	\
-				CONFIG_SYS_I2C_POWER_B_ADDR,	\
-				CONFIG_SYS_I2C_KEYBD_ADDR,	\
-				CONFIG_SYS_I2C_PICIO_ADDR,	\
-				CONFIG_SYS_I2C_EEPROM_ADDR,	\
-			}
+#define CONFIG_SYS_POST_I2C_ADDRS	{/* CONFIG_SYS_I2C_AUDIO_ADDR, */ \
+					 CONFIG_SYS_I2C_SYSMON_ADDR,	\
+					 CONFIG_SYS_I2C_RTC_ADDR,	\
+					 CONFIG_SYS_I2C_POWER_A_ADDR,	\
+					 CONFIG_SYS_I2C_POWER_B_ADDR,	\
+					 CONFIG_SYS_I2C_KEYBD_ADDR,	\
+					 CONFIG_SYS_I2C_PICIO_ADDR,	\
+					 CONFIG_SYS_I2C_EEPROM_ADDR,	\
+					}
 #else	/* Use EEPROM - which show up on 8 consequtive addresses */
-#define I2C_ADDR_LIST	{  /*	CONFIG_SYS_I2C_AUDIO_ADDR, */	\
-				CONFIG_SYS_I2C_SYSMON_ADDR,	\
-				CONFIG_SYS_I2C_RTC_ADDR,	\
-				CONFIG_SYS_I2C_POWER_A_ADDR,	\
-				CONFIG_SYS_I2C_POWER_B_ADDR,	\
-				CONFIG_SYS_I2C_KEYBD_ADDR,	\
-				CONFIG_SYS_I2C_PICIO_ADDR,	\
-				CONFIG_SYS_I2C_EEPROM_ADDR+0,	\
-				CONFIG_SYS_I2C_EEPROM_ADDR+1,	\
-				CONFIG_SYS_I2C_EEPROM_ADDR+2,	\
-				CONFIG_SYS_I2C_EEPROM_ADDR+3,	\
-				CONFIG_SYS_I2C_EEPROM_ADDR+4,	\
-				CONFIG_SYS_I2C_EEPROM_ADDR+5,	\
-				CONFIG_SYS_I2C_EEPROM_ADDR+6,	\
-				CONFIG_SYS_I2C_EEPROM_ADDR+7,	\
-			}
+#define CONFIG_SYS_POST_I2C_ADDRS	{/* CONFIG_SYS_I2C_AUDIO_ADDR, */ \
+					 CONFIG_SYS_I2C_SYSMON_ADDR,	\
+					 CONFIG_SYS_I2C_RTC_ADDR,	\
+					 CONFIG_SYS_I2C_POWER_A_ADDR,	\
+					 CONFIG_SYS_I2C_POWER_B_ADDR,	\
+					 CONFIG_SYS_I2C_KEYBD_ADDR,	\
+					 CONFIG_SYS_I2C_PICIO_ADDR,	\
+					 CONFIG_SYS_I2C_EEPROM_ADDR+0,	\
+					 CONFIG_SYS_I2C_EEPROM_ADDR+1,	\
+					 CONFIG_SYS_I2C_EEPROM_ADDR+2,	\
+					 CONFIG_SYS_I2C_EEPROM_ADDR+3,	\
+					 CONFIG_SYS_I2C_EEPROM_ADDR+4,	\
+					 CONFIG_SYS_I2C_EEPROM_ADDR+5,	\
+					 CONFIG_SYS_I2C_EEPROM_ADDR+6,	\
+					 CONFIG_SYS_I2C_EEPROM_ADDR+7,	\
+					}
 #endif	/* CONFIG_USE_FRAM */
 
 /*-----------------------------------------------------------------------
@@ -610,12 +611,4 @@
  */
 #define CONFIG_SYS_MAR		0x00000088
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD	0x01		/* Normal Power-On: Boot from FLASH	*/
-#define BOOTFLAG_WARM	0x02		/* Software reboot			*/
-
 #endif	/* __CONFIG_H */