X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fm28evk.h;h=b49ec8c7dd61fd4139a145bb62f2f730b23c025f;hb=b7e3129e550957f046c29a917c63f4b503fbfcb9;hp=c62f4d01fd3c477caf263b91bcbf6b4ebdba6055;hpb=2ab5be7af009b4a40efe2fa5471497c97e70ed28;p=u-boot

diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h
index c62f4d01fd..b49ec8c7dd 100644
--- a/include/configs/m28evk.h
+++ b/include/configs/m28evk.h
@@ -17,10 +17,8 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  * MA 02111-1307 USA
  */
-#ifndef __M28_H__
-#define __M28_H__
-
-#include <asm/arch/regs-base.h>
+#ifndef __M28EVK_CONFIG_H__
+#define __M28EVK_CONFIG_H__
 
 /*
  * SoC configurations
@@ -36,22 +34,19 @@
 
 #define	CONFIG_MACH_TYPE	MACH_TYPE_M28EVK
 
+#include <asm/arch/regs-base.h>
+
 #define	CONFIG_SYS_NO_FLASH
-#define	CONFIG_SYS_ICACHE_OFF
-#define	CONFIG_SYS_DCACHE_OFF
 #define	CONFIG_BOARD_EARLY_INIT_F
-#define	CONFIG_ARCH_CPU_INIT
 #define	CONFIG_ARCH_MISC_INIT
 
-#define CONFIG_OF_LIBFDT
-
 /*
  * SPL
  */
 #define	CONFIG_SPL
 #define	CONFIG_SPL_NO_CPU_SUPPORT_CODE
-#define	CONFIG_SPL_START_S_PATH		"arch/arm/cpu/arm926ejs/mx28"
-#define	CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/arm926ejs/mx28/u-boot-spl.lds"
+#define	CONFIG_SPL_START_S_PATH		"arch/arm/cpu/arm926ejs/mxs"
+#define	CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
 #define	CONFIG_SPL_LIBCOMMON_SUPPORT
 #define	CONFIG_SPL_LIBGENERIC_SUPPORT
 #define	CONFIG_SPL_GPIO_SUPPORT
@@ -88,7 +83,6 @@
 #define	CONFIG_NR_DRAM_BANKS		1		/* 1 bank of DRAM */
 #define	PHYS_SDRAM_1			0x40000000	/* Base address */
 #define	PHYS_SDRAM_1_SIZE		0x20000000	/* Max 512 MB RAM */
-#define	CONFIG_STACKSIZE		0x00010000	/* 128 KB stack */
 #define	CONFIG_SYS_MALLOC_LEN		0x00400000	/* 4 MB for malloc */
 #define	CONFIG_SYS_GBL_DATA_SIZE	128		/* Initial data */
 #define	CONFIG_SYS_MEMTEST_START	0x40000000	/* Memtest start adr */
@@ -126,7 +120,6 @@
 #define	CONFIG_AUTO_COMPLETE			/* Command auto complete */
 #define	CONFIG_CMDLINE_EDITING			/* Command history etc */
 #define	CONFIG_SYS_HUSH_PARSER
-#define	CONFIG_SYS_PROMPT_HUSH_PS2	"> "
 
 /*
  * Serial Driver
@@ -136,14 +129,13 @@
 #define	CONFIG_PL01x_PORTS		{ (void *)MXS_UARTDBG_BASE }
 #define	CONFIG_CONS_INDEX		0
 #define	CONFIG_BAUDRATE			115200	/* Default baud rate */
-#define	CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
 
 /*
  * MMC Driver
  */
 #ifdef	CONFIG_CMD_MMC
 #define	CONFIG_MMC
-#define	CONFIG_MMC_BOUNCE_BUFFER
+#define	CONFIG_BOUNCE_BUFFER
 #define	CONFIG_GENERIC_MMC
 #define	CONFIG_MXS_MMC
 #endif
@@ -179,9 +171,9 @@
 #define	CONFIG_LZO
 #define	CONFIG_MTD_DEVICE
 #define	CONFIG_MTD_PARTITIONS
-#define	MTDIDS_DEFAULT			"nand0=gpmi-nand.0"
+#define	MTDIDS_DEFAULT			"nand0=gpmi-nand"
 #define	MTDPARTS_DEFAULT			\
-	"mtdparts=gpmi-nand.0:"			\
+	"mtdparts=gpmi-nand:"			\
 		"3m(bootloader)ro,"		\
 		"512k(environment),"		\
 		"512k(redundant-environment),"	\
@@ -199,7 +191,6 @@
 #define	CONFIG_FEC_MXC
 #define	CONFIG_FEC_MXC_MULTI
 #define	CONFIG_MII
-#define	CONFIG_DISCOVER_PHY
 #define	CONFIG_FEC_XCV_TYPE		RMII
 #endif
 
@@ -252,21 +243,24 @@
 #ifdef	CONFIG_CMD_SPI
 #define	CONFIG_HARD_SPI
 #define	CONFIG_MXS_SPI
+#define	CONFIG_MXS_SPI_DMA_ENABLE
 #define	CONFIG_SPI_HALF_DUPLEX
 #define	CONFIG_DEFAULT_SPI_BUS		2
+#define	CONFIG_DEFAULT_SPI_CS		0
 #define	CONFIG_DEFAULT_SPI_MODE		SPI_MODE_0
 
 /* SPI FLASH */
 #ifdef	CONFIG_CMD_SF
 #define	CONFIG_SPI_FLASH
 #define	CONFIG_SPI_FLASH_STMICRO
-#define	CONFIG_SF_DEFAULT_CS		2
+#define	CONFIG_SF_DEFAULT_BUS		2
+#define	CONFIG_SF_DEFAULT_CS		0
+#define	CONFIG_SF_DEFAULT_SPEED		40000000
 #define	CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
-#define	CONFIG_SF_DEFAULT_SPEED		24000000
 
-#define	CONFIG_ENV_SPI_CS		0
 #define	CONFIG_ENV_SPI_BUS		2
-#define	CONFIG_ENV_SPI_MAX_HZ		24000000
+#define	CONFIG_ENV_SPI_CS		0
+#define	CONFIG_ENV_SPI_MAX_HZ		40000000
 #define	CONFIG_ENV_SPI_MODE		SPI_MODE_0
 #endif
 #endif
@@ -327,4 +321,4 @@
 		"fi ; "							\
 		"fi\0"
 
-#endif /* __M28_H__ */
+#endif /* __M28EVK_CONFIG_H__ */