X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fmecp5123.h;h=b41bda9c6430ebe4b4145883c374a6e6c92afbdf;hb=de6f604de245b19ce2e330bc63b6522af134d7ae;hp=1ecae005ce2c3efe42340529081765900b0215e1;hpb=433ea8abd6adfae3138dd4ce238237a037e1e537;p=u-boot

diff --git a/include/configs/mecp5123.h b/include/configs/mecp5123.h
index 1ecae005ce..b41bda9c64 100644
--- a/include/configs/mecp5123.h
+++ b/include/configs/mecp5123.h
@@ -48,6 +48,8 @@
 #define CONFIG_E300		1	/* E300 Family */
 #define CONFIG_MPC512X		1	/* MPC512X family */
 
+#define	CONFIG_SYS_TEXT_BASE	0xFFF00000
+
 #define CONFIG_SYS_MPC512X_CLKIN	33333333	/* in Hz */
 
 #define CONFIG_BOARD_EARLY_INIT_F		/* call board_early_init_f() */
@@ -66,6 +68,9 @@
 
 #define CONFIG_SYS_DDR_BASE		0x00000000	/* DDR is sys memory*/
 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_BASE
+#define CONFIG_SYS_MAX_RAM_SIZE		0x20000000
+
+#define CONFIG_SYS_IOCTRL_MUX_DDR	0x00000036
 
 /* DDR Controller Configuration
  *
@@ -111,22 +116,19 @@
  *	[09:05]	DRAM tRP:
  *	[04:00] DRAM tRPA
  */
-#define CONFIG_SYS_MDDRC_SYS_CFG	 0xFA804A00
-#define CONFIG_SYS_MDDRC_SYS_CFG_RUN	 0xEA804A00
+#define CONFIG_SYS_MDDRC_SYS_CFG	 0xEA804A00
+#define CONFIG_SYS_MDDRC_TIME_CFG0	 0x06183D2E
 #define CONFIG_SYS_MDDRC_TIME_CFG1	 0x68EC1168
 #define CONFIG_SYS_MDDRC_TIME_CFG2	 0x34310864
-#define CONFIG_SYS_MDDRC_SYS_CFG_EN	0xF0000000
-#define CONFIG_SYS_MDDRC_TIME_CFG0	0x00003D2E
-#define CONFIG_SYS_MDDRC_TIME_CFG0_RUN	0x06183D2E
-
-#define CONFIG_SYS_MICRON_NOP		0x01380000
-#define CONFIG_SYS_MICRON_PCHG_ALL	0x01100400
-#define CONFIG_SYS_MICRON_EM2		0x01020000
-#define CONFIG_SYS_MICRON_EM3		0x01030000
-#define CONFIG_SYS_MICRON_EN_DLL	0x01010000
-#define CONFIG_SYS_MICRON_RFSH		0x01080000
+
+#define CONFIG_SYS_DDRCMD_NOP		0x01380000
+#define CONFIG_SYS_DDRCMD_PCHG_ALL	0x01100400
+#define CONFIG_SYS_DDRCMD_EM2		0x01020000
+#define CONFIG_SYS_DDRCMD_EM3		0x01030000
+#define CONFIG_SYS_DDRCMD_EN_DLL	0x01010000
+#define CONFIG_SYS_DDRCMD_RFSH		0x01080000
 #define CONFIG_SYS_MICRON_INIT_DEV_OP	0x01000432
-#define CONFIG_SYS_MICRON_OCD_DEFAULT	0x01010780
+#define CONFIG_SYS_DDRCMD_OCD_DEFAULT	0x01010780
 
 /* DDR Priority Manager Configuration */
 #define CONFIG_SYS_MDDRCGRP_PM_CFG1	0x00077777
@@ -176,11 +178,7 @@
 #define CONFIG_CMD_NAND
 #define CONFIG_NAND_MPC5121_NFC
 #define CONFIG_SYS_NAND_BASE            0x40000000
-
 #define CONFIG_SYS_MAX_NAND_DEVICE      1
-#define NAND_MAX_CHIPS                  CONFIG_SYS_MAX_NAND_DEVICE
-
-#define	CONFIG_SYS_64BIT_VSPRINTF	/* needed for nand_util.c */
 
 /*
  * Configuration parameters for MPC5121 NAND driver
@@ -206,13 +204,12 @@
 
 /* Use SRAM for initial stack */
 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_SRAM_BASE /* Init RAM addr */
-#define CONFIG_SYS_INIT_RAM_END		CONFIG_SYS_SRAM_SIZE
+#define CONFIG_SYS_INIT_RAM_SIZE		CONFIG_SYS_SRAM_SIZE
 
-#define CONFIG_SYS_GBL_DATA_SIZE	0x100		/* num bytes initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
-#define CONFIG_SYS_MONITOR_BASE		TEXT_BASE	/* Start of monitor */
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE	/* Start of monitor */
 #define CONFIG_SYS_MONITOR_LEN		(256 * 1024)	/* Monitor length */
 #define CONFIG_SYS_MALLOC_LEN		(6 * 1024 * 1024) /* Malloc size */
 
@@ -220,7 +217,6 @@
  * Serial Port
  */
 #define CONFIG_CONS_INDEX     1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
 
 /*
  * Serial console configuration
@@ -242,7 +238,6 @@
 /* Use the HUSH parser */
 #define CONFIG_SYS_HUSH_PARSER
 #ifdef  CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
 #endif
 
 /* I2C */
@@ -270,7 +265,6 @@
  * Ethernet configuration
  */
 #define CONFIG_MPC512x_FEC	1
-#define CONFIG_NET_MULTI
 #define CONFIG_PHY_ADDR		0x1
 #define CONFIG_MII		1	/* MII PHY management		*/
 #define CONFIG_FEC_AN_TIMEOUT	1
@@ -346,10 +340,10 @@
 
 /*
  * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
+ * have to be in the first 256 MB of memory, since this is
  * the maximum mapped by the Linux kernel during initialization.
  */
-#define CONFIG_SYS_BOOTMAPSZ	(8 << 20)	/* Linux initial memory map */
+#define CONFIG_SYS_BOOTMAPSZ	(256 << 20)	/* Linux initial memory map */
 
 /* Cache Configuration */
 #define CONFIG_SYS_DCACHE_SIZE		32768
@@ -364,14 +358,6 @@
 
 #define CONFIG_HIGH_BATS	1	/* High BATs supported */
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM		0x02	/* Software reboot */
-
 #ifdef CONFIG_CMD_KGDB
 #define CONFIG_KGDB_BAUDRATE	230400	/* speed of kgdb serial port */
 #define CONFIG_KGDB_SER_INDEX	2	/* which serial port to use */
@@ -383,8 +369,8 @@
 #define CONFIG_TIMESTAMP
 
 #define CONFIG_HOSTNAME		mecp512x
-#define CONFIG_BOOTFILE		/tftpboot/mecp512x/uImage
-#define CONFIG_ROOTPATH		/tftpboot/mecp512x/target_root
+#define CONFIG_BOOTFILE		"/tftpboot/mecp512x/uImage"
+#define CONFIG_ROOTPATH		"/tftpboot/mecp512x/target_root"
 
 #define CONFIG_LOADADDR		400000	/* def. location for tftp and bootm */