X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fmx31pdk.h;h=a81dd784c9984dd1a211c86a6b4ff5035aeb9a6f;hb=2290fe06421720d1c54523a9acf1052181bc6e87;hp=2a3e53c7928ca8d32950df854307330026dce538;hpb=fce0a90a68de507dc827c1ff40d9e446047fa043;p=u-boot diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 2a3e53c792..a81dd784c9 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -19,8 +19,6 @@ /* High Level Configuration Options */ #define CONFIG_MX31 /* This is a mx31 */ -#define CONFIG_SYS_GENERIC_BOARD - #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO @@ -35,6 +33,7 @@ #define CONFIG_SPL_MAX_SIZE 2048 #define CONFIG_SPL_NAND_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_TEXT_BASE 0x87dc0000 #define CONFIG_SYS_TEXT_BASE 0x87e00000 @@ -80,26 +79,11 @@ /*********************************************************** * Command definition ***********************************************************/ - -#include - -#define CONFIG_CMD_MII -#define CONFIG_CMD_PING -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_SPI #define CONFIG_CMD_DATE #define CONFIG_CMD_NAND -#define CONFIG_CMD_BOOTZ - -/* - * Disabled due to compilation errors in cmd_bootm.c (IMLS seems to require - * that CFG_NO_FLASH is undefined). - */ -#undef CONFIG_CMD_IMLS #define CONFIG_BOARD_LATE_INIT -#define CONFIG_BOOTDELAY 1 #define CONFIG_EXTRA_ENV_SETTINGS \ "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \ @@ -121,9 +105,6 @@ */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT)+16) /* max number of command args */ #define CONFIG_SYS_MAXARGS 16 /* Boot Argument Buffer Size */ @@ -177,7 +158,7 @@ /* NAND configuration for the NAND_SPL */ -/* Start copying real U-boot from the second page */ +/* Start copying real U-Boot from the second page */ #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x3f800 /* Load U-Boot to this address */ @@ -190,7 +171,6 @@ #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 - /* Configuration of lowlevel_init.S (clocks and SDRAM) */ #define CCM_CCMR_SETUP 0x074B0BF5 #define CCM_PDR0_SETUP_532MHZ (PDR0_CSI_PODF(0x3f) | PDR0_CSI_PRDF(7) | \