X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fmx53evk.h;h=11fe6efe626517403cb003374259227b27cd395d;hb=928c4bdf9b069be218436d25b96721395c4d671f;hp=b127b06cc38e4124125eeab5bf3a40fd1c0d5075;hpb=1fed668b3fb9c35932f58af00ff5539239fa4e1d;p=u-boot diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h index b127b06cc3..11fe6efe62 100644 --- a/include/configs/mx53evk.h +++ b/include/configs/mx53evk.h @@ -33,35 +33,36 @@ #include -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_REVISION_TAG 1 -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG -#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_LIBFDT /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) #define CONFIG_BOARD_EARLY_INIT_F -#define BOARD_LATE_INIT +#define CONFIG_BOARD_LATE_INIT #define CONFIG_MXC_GPIO #define CONFIG_MXC_UART -#define CONFIG_SYS_MX53_UART1 +#define CONFIG_MXC_UART_BASE UART1_BASE /* I2C Configs */ -#define CONFIG_CMD_I2C 1 -#define CONFIG_HARD_I2C 1 -#define CONFIG_I2C_MXC 1 +#define CONFIG_CMD_I2C +#define CONFIG_HARD_I2C +#define CONFIG_I2C_MXC #define CONFIG_SYS_I2C_MX53_PORT2 1 #define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_SLAVE 0xfe /* PMIC Configs */ -#define CONFIG_FSL_PMIC -#define CONFIG_FSL_PMIC_I2C +#define CONFIG_PMIC +#define CONFIG_PMIC_I2C +#define CONFIG_PMIC_FSL #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8 +#define CONFIG_RTC_MC13XXX /* MMC Configs */ #define CONFIG_FSL_ESDHC @@ -76,7 +77,6 @@ /* Eth Configs */ #define CONFIG_HAS_ETH1 -#define CONFIG_NET_MULTI #define CONFIG_MII #define CONFIG_DISCOVER_PHY @@ -88,6 +88,7 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_MII #define CONFIG_CMD_NET +#define CONFIG_CMD_DATE /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -102,7 +103,7 @@ #define CONFIG_BOOTDELAY 3 -#define CONFIG_PRIME "FEC0" +#define CONFIG_ETHPRIME "FEC0" #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */ #define CONFIG_SYS_TEXT_BASE 0x77800000