X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fmx6qsabrelite.h;h=4ce4d4c086580a683e53195df7b7155b8c4225d9;hb=2c601c7208713ba9b2158c57adcf515f4bdbc212;hp=492c618df8c9ca70479b1774d6f4b7d84e90926a;hpb=5fbfd1c29bce9446f7151ae514cfc71fba00cf3d;p=u-boot diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index 492c618df8..4ce4d4c086 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -22,15 +22,15 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_MX6 #define CONFIG_MX6Q -#define CONFIG_SYS_MX6_HCLK 24000000 -#define CONFIG_SYS_MX6_CLK32 32768 #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO #define CONFIG_MACH_TYPE 3769 #include +#include #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS @@ -38,10 +38,10 @@ #define CONFIG_REVISION_TAG /* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) -#define CONFIG_ARCH_CPU_INIT #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R #define CONFIG_MXC_GPIO #define CONFIG_MXC_UART @@ -53,11 +53,17 @@ #define CONFIG_SPI_FLASH_SST #define CONFIG_MXC_SPI #define CONFIG_SF_DEFAULT_BUS 0 -#define CONFIG_SF_DEFAULT_CS (0|(GPIO_NUMBER(3, 19)<<8)) +#define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(3, 19)<<8)) #define CONFIG_SF_DEFAULT_SPEED 25000000 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) #endif +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_I2C_MULTI_BUS +#define CONFIG_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 + /* MMC Configs */ #define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC @@ -67,10 +73,24 @@ #define CONFIG_MMC #define CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION +#define CONFIG_CMD_SATA +/* + * SATA Configs + */ +#ifdef CONFIG_CMD_SATA +#define CONFIG_DWC_AHSATA +#define CONFIG_SYS_SATA_MAX_DEVICE 1 +#define CONFIG_DWC_AHSATA_PORT_ID 0 +#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR +#define CONFIG_LBA48 +#define CONFIG_LIBATA +#endif + #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_MII @@ -83,6 +103,7 @@ #define CONFIG_FEC_MXC_PHYADDR 6 #define CONFIG_PHYLIB #define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 /* USB Configs */ #define CONFIG_CMD_USB @@ -97,18 +118,35 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_IPUV3_CLK 260000000 + /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} /* Command definition */ #include #undef CONFIG_CMD_IMLS -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_PREBOOT "" #define CONFIG_LOADADDR 0x10800000 #define CONFIG_SYS_TEXT_BASE 0x17800000 @@ -141,7 +179,7 @@ #define CONFIG_BOOTCOMMAND \ "mmc dev ${mmcdev};" \ - "if mmc rescan ${mmcdev}; then " \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ @@ -157,7 +195,6 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP #define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_SYS_PROMPT "MX6QSABRELITE U-Boot > " #define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_CBSIZE 256 @@ -174,7 +211,6 @@ #define CONFIG_SYS_HZ 1000 #define CONFIG_CMDLINE_EDITING -#define CONFIG_STACKSIZE (128 * 1024) /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 @@ -213,8 +249,6 @@ #define CONFIG_OF_LIBFDT #define CONFIG_CMD_BOOTZ -#define CONFIG_SYS_DCACHE_OFF - #ifndef CONFIG_SYS_DCACHE_OFF #define CONFIG_CMD_CACHE #endif