X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fns9750dev.h;h=3f49c6f0b130b0f4c76a0ccd92ab87a7fa6565b6;hb=039cbaefcf57338cc9b6a3c656db64e7907838db;hp=1d691f9731d22849f5bf39a1f9afdabeab14416a;hpb=d1bc6c8d5f4a9c7ca9fb2292d5c65f846dcc3995;p=u-boot diff --git a/include/configs/ns9750dev.h b/include/configs/ns9750dev.h index 1d691f9731..3f49c6f0b1 100644 --- a/include/configs/ns9750dev.h +++ b/include/configs/ns9750dev.h @@ -42,27 +42,23 @@ #define AHB_CLK_FREQ (CONFIG_SYS_CLK_FREQ/4) #define BBUS_CLK_FREQ (CONFIG_SYS_CLK_FREQ/8) -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ /*@TODO #define CONFIG_STATUS_LED*/ #define CONFIG_USE_IRQ /* * Size of malloc() pool */ -#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) -#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial - * data */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) /* * Hardware drivers */ -#define CFG_NS9750_UART 1 /* use on-chip UART */ -#define CONFIG_DRIVER_NS9750_ETHERNET 1 /* use on-chip ethernet */ +#define CONFIG_NS9750_UART 1 /* use on-chip UART */ /* * select serial console configuration */ -#define CONFIG_CONS_INDEX 1 /* Port B */ +#define CONFIG_CONS_INDEX 1 /* Port B */ /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -88,12 +84,11 @@ #define CONFIG_CMD_LOADB #define CONFIG_CMD_LOADS #define CONFIG_CMD_MEMORY -#define CONFIG_CMD_NET #define CONFIG_CMD_PING #define CONFIG_BOOTDELAY 3 -/*#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600" */ +/*#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600" */ #define CONFIG_ETHADDR 00:04:f3:ff:ff:fb /*@TODO unset */ #define CONFIG_NETMASK 255.255.255.0 @@ -112,33 +107,25 @@ /* * Miscellaneous configurable options */ -#define CFG_LONGHELP /* undef to save memory */ -#define CFG_PROMPT "NS9750DEV # " /* Monitor Command Prompt */ -#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ -#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ -#define CFG_MAXARGS 16 /* max number of command args */ -#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "NS9750DEV # " /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#define CFG_MEMTEST_START 0x00000000 /* memtest works on */ -#define CFG_MEMTEST_END 0x00780000 /* 7,5 MB in DRAM */ /* @TODO */ +#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x00780000 /* 7,5 MB in DRAM */ /* @TODO */ -#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ +#define CONFIG_SYS_LOAD_ADDR 0x00600000 /* default load address */ /* @TODO */ -#define CFG_LOAD_ADDR 0x00600000 /* default load address */ /* @TODO */ - -#define CFG_HZ (CPU_CLK_FREQ/64) - -/* valid baudrates */ -#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#define CONFIG_SYS_HZ (CPU_CLK_FREQ/64) #define NS9750_ETH_PHY_ADDRESS (0x0000) /*----------------------------------------------------------------------- * Stack sizes - * - * The stack sizes are set up in start.S using the settings below */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ #ifdef CONFIG_USE_IRQ #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ @@ -156,7 +143,7 @@ #define PHYS_FLASH_1 0x50000000 /* Flash Bank #1 */ -#define CFG_FLASH_BASE PHYS_FLASH_1 +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 /*----------------------------------------------------------------------- * FLASH and environment organization @@ -168,26 +155,26 @@ #define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */ #endif -#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ #ifdef CONFIG_AMD_LV800 #define PHYS_FLASH_SIZE 0x00100000 /* 1MB */ -#define CFG_MAX_FLASH_SECT (19) /* max number of sectors on one chip */ -#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x0F0000) /* addr of environment */ +#define CONFIG_SYS_MAX_FLASH_SECT (19) /* max number of sectors on one chip */ +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */ #endif #ifdef CONFIG_AMD_LV400 #define PHYS_FLASH_SIZE 0x00080000 /* 512KB */ -#define CFG_MAX_FLASH_SECT (11) /* max number of sectors on one chip */ -#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x070000) /* addr of environment */ +#define CONFIG_SYS_MAX_FLASH_SECT (11) /* max number of sectors on one chip */ +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000) /* addr of environment */ #endif /* timeout values are in ticks */ -#define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* Timeout for Flash Erase */ -#define CFG_FLASH_WRITE_TOUT (5*CFG_HZ) /* Timeout for Flash Write */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ +#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */ /* @TODO */ -/*#define CFG_ENV_IS_IN_FLASH 1*/ -#define CFG_ENV_IS_NOWHERE -#define CFG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */ +/*#define CONFIG_ENV_IS_IN_FLASH 1*/ +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */ #ifdef CONFIG_STATUS_LED