X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fomap3_igep00x0.h;h=9bd891586cd86e6b8596535fea995c5a03fae6db;hb=2290fe06421720d1c54523a9acf1052181bc6e87;hp=4409103f4912c5b08b5e4e715f8084bd00eba5ad;hpb=13a3972585af60ec367d209cedbd3601e0c77467;p=u-boot

diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h
index 4409103f49..9bd891586c 100644
--- a/include/configs/omap3_igep00x0.h
+++ b/include/configs/omap3_igep00x0.h
@@ -19,7 +19,12 @@
 #include <configs/ti_omap3_common.h>
 #include <asm/mach-types.h>
 
-#undef CONFIG_BOOTDELAY
+/* SRAM starts at 0x40200000 and ends at 0x4020FFFF (64KB) */
+#undef CONFIG_SPL_MAX_SIZE
+#undef CONFIG_SPL_TEXT_BASE
+
+#define CONFIG_SPL_MAX_SIZE		(SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE)
+#define CONFIG_SPL_TEXT_BASE		0x40200000
 
 /*
  * Display CPU and Board information
@@ -43,7 +48,7 @@
 #else
 #error "status LED not defined for this machine."
 #endif
-#define RED_LED_DEV				0
+#define RED_LED_DEV			0
 #define STATUS_LED_BIT			RED_LED_GPIO
 #define STATUS_LED_STATE		STATUS_LED_ON
 #define STATUS_LED_PERIOD		(CONFIG_SYS_HZ / 2)
@@ -56,7 +61,7 @@
 #define CONFIG_OMAP3_GPIO_6		/* GPIO160..191 is in GPIO bank 6 */
 
 /* USB */
-#define CONFIG_USB_MUSB_UDC			1
+#define CONFIG_USB_MUSB_UDC		1
 #define CONFIG_USB_OMAP3		1
 #define CONFIG_TWL4030_USB		1
 
@@ -71,22 +76,12 @@
 #define CONFIG_USBD_MANUFACTURER	"Texas Instruments"
 #define CONFIG_USBD_PRODUCT_NAME	"IGEP"
 
-#define CONFIG_CMD_CACHE
 #ifdef CONFIG_BOOT_ONENAND
 #define CONFIG_CMD_ONENAND	/* ONENAND support		*/
 #endif
-#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
-    (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0032)
-#endif
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_PING
-
-/*#undef CONFIG_ENV_IS_NOWHERE*/
 
 #ifndef CONFIG_SPL_BUILD
 
-#include <config_distro_defaults.h>
-
 /* Environment */
 #define ENV_DEVICE_SETTINGS \
 	"stdin=serial\0" \
@@ -103,7 +98,6 @@
 
 #include <config_distro_bootcmd.h>
 
-
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	ENV_DEVICE_SETTINGS \
 	MEM_LAYOUT_SETTINGS \
@@ -138,7 +132,7 @@
 #if defined(CONFIG_CMD_NET)
 #define CONFIG_SMC911X
 #define CONFIG_SMC911X_32_BIT
-#define CONFIG_SMC911X_BASE	0x2C000000
+#define CONFIG_SMC911X_BASE		0x2C000000
 #endif /* (CONFIG_CMD_NET) */
 
 /* OneNAND boot config */
@@ -160,12 +154,20 @@
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
 #define CONFIG_SYS_NAND_OOBSIZE		64
 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
-#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
-#define CONFIG_SYS_NAND_ECCPOS		{2, 3, 4, 5, 6, 7, 8, 9,\
-						10, 11, 12, 13}
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
+#define CONFIG_SYS_NAND_ECCPOS		{ 2,  3,  4,  5,  6,  7,  8,  9, \
+					 10, 11, 12, 13, 14, 15, 16, 17, \
+					 18, 19, 20, 21, 22, 23, 24, 25, \
+					 26, 27, 28, 29, 30, 31, 32, 33, \
+					 34, 35, 36, 37, 38, 39, 40, 41, \
+					 42, 43, 44, 45, 46, 47, 48, 49, \
+					 50, 51, 52, 53, 54, 55, 56, 57, }
 #define CONFIG_SYS_NAND_ECCSIZE		512
-#define CONFIG_SYS_NAND_ECCBYTES	3
-#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_HAM1_CODE_HW
+#define CONFIG_SYS_NAND_ECCBYTES	14
+#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
+#define CONFIG_NAND_OMAP_GPMC
+#define CONFIG_BCH
+
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
 /* NAND: SPL falcon mode configs */
 #ifdef CONFIG_SPL_OS_BOOT