X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fpcm030.h;h=406f3e547ab9f381d5bcbbe09b590e7c96a4a8ab;hb=d29adf8eef4e9557326fd0bc09a08c7dfa688eab;hp=676f40c51a1523fd34fe3d97414159ab9a696e90;hpb=1032d97496f6d534bf0030a5779ff1cb38cc9ebf;p=u-boot diff --git a/include/configs/pcm030.h b/include/configs/pcm030.h index 676f40c51a..406f3e547a 100644 --- a/include/configs/pcm030.h +++ b/include/configs/pcm030.h @@ -8,23 +8,7 @@ * (C) Copyright 2009 * Jon Smirl * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -36,8 +20,7 @@ High Level Configuration Options (easy to change) -----------------------------------------------------------------------------*/ -#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ -#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */ +#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */ #define CONFIG_MPC5200_DDR 1 /* (with DDR-SDRAM) */ #define CONFIG_PHYCORE_MPC5200B_TINY 1 /* phyCORE-MPC5200B -> */ /* FEC configuration and IDE */ @@ -61,21 +44,12 @@ Serial console configuration /*define gps port conf. */ /* register later on to */ /*enable UART function! */ -#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } /* * Command line configuration. */ -#include - -#define CONFIG_CMD_DATE -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_EEPROM -#define CONFIG_CMD_I2C #define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_MII -#define CONFIG_CMD_NFS #define CONFIG_CMD_PCI #define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */ @@ -90,15 +64,8 @@ Serial console configuration #define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:256k(ubootl)," \ "1792k(kernel),13312k(jffs2),256k(uboot)ro,256k(oftree),-(space)" -/*----------------------------------------------------------------------------- -Autobooting ------------------------------------------------------------------------------*/ -#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */ -#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow stopping of boot process */ - /* even with bootdelay=0 */ #undef CONFIG_BOOTARGS - #define CONFIG_PREBOOT "echo;" \ "echo Type \"run bootcmd_net\" to load Kernel over TFTP and to "\ "mount root filesystem over NFS;" \ @@ -143,8 +110,6 @@ IPB Bus clocking configuration. * 0x40000000 - 0x4fffffff - PCI Memory * 0x50000000 - 0x50ffffff - PCI IO Space * -----------------------------------------------------------------------*/ -#define CONFIG_PCI 1 -#define CONFIG_PCI_PNP 1 #define CONFIG_PCI_SCAN_SHOW 1 #define CONFIG_PCI_MEM_BUS 0x40000000 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS @@ -154,31 +119,6 @@ IPB Bus clocking configuration. #define CONFIG_PCI_IO_SIZE 0x01000000 #define CONFIG_SYS_XLB_PIPELINING 1 -/*--------------------------------------------------------------------------- - I2C configuration ----------------------------------------------------------------------------*/ -#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ -#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */ -#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */ -#define CONFIG_SYS_I2C_SLAVE 0x7F - -/*--------------------------------------------------------------------------- - EEPROM CAT24WC32 configuration ----------------------------------------------------------------------------*/ -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* 1010100x */ -#define CONFIG_SYS_I2C_FACT_ADDR 0x52 /* EEPROM CAT24WC32 */ -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */ -#define CONFIG_SYS_EEPROM_SIZE 2048 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 15 - -/*--------------------------------------------------------------------------- -RTC configuration ----------------------------------------------------------------------------*/ -#define RTC -#define CONFIG_RTC_PCF8563 1 -#define CONFIG_SYS_I2C_RTC_ADDR 0x51 - /*--------------------------------------------------------------------------- Flash configuration ---------------------------------------------------------------------------*/ @@ -206,11 +146,10 @@ RTC configuration Environment settings ---------------------------------------------------------------------------*/ -/* pcm030 ships with environment is EEPROM by default */ -#define CONFIG_ENV_IS_IN_EEPROM 1 +#define CONFIG_ENV_IS_NOWHERE #define CONFIG_ENV_OFFSET 0x00 /* environment starts at the */ /*beginning of the EEPROM */ -#define CONFIG_ENV_SIZE CONFIG_SYS_EEPROM_SIZE +#define CONFIG_ENV_SIZE 2048 #define CONFIG_ENV_OVERWRITE 1 @@ -225,7 +164,6 @@ RTC configuration #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used */ /* area in DPRAM */ - /* reserved for initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET @@ -358,7 +296,6 @@ RTC configuration Miscellaneous configurable options -------------------------------------------------------------------------------*/ #define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "uboot> " /* Monitor Command Prompt */ #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ @@ -381,9 +318,6 @@ RTC configuration #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ #define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */ -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ - -#define CONFIG_DISPLAY_BOARDINFO 1 /*----------------------------------------------------------------------------- Various low-level settings @@ -433,17 +367,10 @@ RTC configuration #define CONFIG_SYS_ATA_STRIDE 4 #define CONFIG_ATAPI 1 -/* we enable IDE and FAT support, so we also need partition support */ -#define CONFIG_DOS_PARTITION 1 - /* USB */ #define CONFIG_USB_OHCI -#define CONFIG_USB_STORAGE /* pass open firmware flat tree */ -#define CONFIG_OF_LIBFDT 1 -#define CONFIG_OF_BOARD_SETUP 1 - #define OF_CPU "PowerPC,5200@0" #define OF_TBCLK CONFIG_SYS_MPC5XXX_CLKIN #define OF_SOC "soc5200@f0000000"