X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fpeach-pi.h;h=d90eb14f6f4409eafccf2d93bdd8262cd706efcb;hb=de42975141215e7d02e0ab696b3138959bf2042c;hp=d8da7ef91933d655c6c5f0301bb343442194af1b;hpb=79043d84da076e4eb47e04495c55216897c9a161;p=u-boot

diff --git a/include/configs/peach-pi.h b/include/configs/peach-pi.h
index d8da7ef919..d90eb14f6f 100644
--- a/include/configs/peach-pi.h
+++ b/include/configs/peach-pi.h
@@ -1,35 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2014 Samsung Electronics
  *
  * Configuration settings for the SAMSUNG/GOOGLE PEACH-PI board.
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __CONFIG_PEACH_PI_H
 #define __CONFIG_PEACH_PI_H
 
-#define CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_SPI_FLASH
-#define CONFIG_ENV_SPI_BASE	0x12D30000
-#define FLASH_SIZE		(0x4 << 20)
-#define CONFIG_ENV_OFFSET	(FLASH_SIZE - CONFIG_BL2_SIZE)
+#define MEM_LAYOUT_ENV_SETTINGS \
+	"bootm_size=0x10000000\0" \
+	"kernel_addr_r=0x22000000\0" \
+	"fdt_addr_r=0x23000000\0" \
+	"ramdisk_addr_r=0x23300000\0" \
+	"scriptaddr=0x30000000\0" \
+	"pxefile_addr_r=0x31000000\0"
 
 #include <configs/exynos5420-common.h>
 #include <configs/exynos5-dt-common.h>
+#include <configs/exynos5-common.h>
 
-#define CONFIG_BOARD_COMMON
+#define CONFIG_SYS_SDRAM_BASE	0x20000000
+#define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_IRAM_TOP - 0x800)
 
 /* select serial console configuration */
 #define CONFIG_SERIAL3		/* use SERIAL 3 */
-
-#define CONFIG_SYS_PROMPT	"Peach-Pi # "
-#define CONFIG_IDENT_STRING	" for Peach-Pi"
-
-#define CONFIG_VIDEO_PARADE
+#define CONFIG_DEFAULT_CONSOLE	"console=ttySAC1,115200n8\0"
 
 /* Display */
-#define CONFIG_LCD
 #ifdef CONFIG_LCD
 #define CONFIG_EXYNOS_FB
 #define CONFIG_EXYNOS_DP
@@ -37,10 +35,9 @@
 #endif
 
 #define CONFIG_POWER_TPS65090_EC
-#define CONFIG_CROS_EC_SPI		/* Support CROS_EC over SPI */
-#define CONFIG_DM_CROS_EC
 
-#define CONFIG_USB_XHCI
-#define CONFIG_USB_XHCI_EXYNOS
+/* DRAM Memory Banks */
+#define CONFIG_NR_DRAM_BANKS	7
+#define SDRAM_BANK_SIZE		(512UL << 20UL)	/* 512 MB */
 
 #endif	/* __CONFIG_PEACH_PI_H */