X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fpeach-pit.h;h=3ee42ef2c8b6aa8eaecc7111a640bf5de3792b40;hb=3f6dcdb9cd4dbda226a1474f1e9398413e906b41;hp=ad5db57f5f94678591d2c6f2398cd3ca83ed2bd9;hpb=9b416a9f4ca7cf5ac4d5f7143d67edde7f7d7326;p=u-boot

diff --git a/include/configs/peach-pit.h b/include/configs/peach-pit.h
index ad5db57f5f..3ee42ef2c8 100644
--- a/include/configs/peach-pit.h
+++ b/include/configs/peach-pit.h
@@ -14,14 +14,28 @@
 #define CONFIG_ENV_SPI_BASE	0x12D30000
 #define FLASH_SIZE		(0x4 << 20)
 #define CONFIG_ENV_OFFSET	(FLASH_SIZE - CONFIG_BL2_SIZE)
+#define CONFIG_SPI_BOOTING
+
+#define MEM_LAYOUT_ENV_SETTINGS \
+	"bootm_size=0x10000000\0" \
+	"kernel_addr_r=0x22000000\0" \
+	"fdt_addr_r=0x23000000\0" \
+	"ramdisk_addr_r=0x23300000\0" \
+	"scriptaddr=0x30000000\0" \
+	"pxefile_addr_r=0x31000000\0"
 
 #include <configs/exynos5420-common.h>
 #include <configs/exynos5-dt-common.h>
 
 #define CONFIG_BOARD_COMMON
 
+#define CONFIG_SYS_SDRAM_BASE	0x20000000
+#define CONFIG_SYS_TEXT_BASE	0x23E00000
+#define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_IRAM_TOP - 0x800)
+
 /* select serial console configuration */
 #define CONFIG_SERIAL3		/* use SERIAL 3 */
+#define CONFIG_DEFAULT_CONSOLE	"console=ttySAC1,115200n8\0"
 
 #define CONFIG_SYS_PROMPT	"Peach-Pit # "
 #define CONFIG_IDENT_STRING	" for Peach-Pit"
@@ -37,8 +51,6 @@
 #endif
 
 #define CONFIG_POWER_TPS65090_EC
-#define CONFIG_CROS_EC_SPI		/* Support CROS_EC over SPI */
-#define CONFIG_DM_CROS_EC
 
 #define CONFIG_USB_XHCI
 #define CONFIG_USB_XHCI_EXYNOS