X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fpengwyn.h;h=816c571511f9b749c0abcee78c2661faeb717a64;hb=66669fcf809c1e3ff644b12e04e625d3737ffd8e;hp=85104057a96465bc38befb75e03763f5aa5e61ae;hpb=22692ec0fbdb455ca16d4d0e27768c6b6deb4243;p=u-boot diff --git a/include/configs/pengwyn.h b/include/configs/pengwyn.h index 85104057a9..816c571511 100644 --- a/include/configs/pengwyn.h +++ b/include/configs/pengwyn.h @@ -102,7 +102,7 @@ "run mmcboot;" \ "run nandboot;" -/* NS16550 Configuration: primary UART via FDTI */ +/* NS16550 Configuration: primary UART via FTDI */ #define CONFIG_SYS_NS16550_COM1 0x44e09000 #define CONFIG_BAUDRATE 115200 @@ -112,7 +112,6 @@ #define CONFIG_ENV_EEPROM_IS_ON_I2C #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 -#define CONFIG_SYS_I2C_MULTI_EEPROMS /* SPL */ #define CONFIG_SPL_POWER_SUPPORT @@ -127,38 +126,63 @@ #define CONFIG_CMD_NAND #define CONFIG_NAND_OMAP_GPMC #define CONFIG_NAND_OMAP_ELM + +/* NAND Configuration. */ #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ CONFIG_SYS_NAND_PAGE_SIZE) -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_OOBSIZE 64 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) +#define CONFIG_SYS_NAND_PAGE_SIZE 4096 +#define CONFIG_SYS_NAND_OOBSIZE 224 +#define CONFIG_SYS_NAND_ONFI_DETECTION +#define CONFIG_SYS_NAND_BLOCK_SIZE (128*4096) #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS -#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ - 10, 11, 12, 13, 14, 15, 16, 17, \ - 18, 19, 20, 21, 22, 23, 24, 25, \ - 26, 27, 28, 29, 30, 31, 32, 33, \ - 34, 35, 36, 37, 38, 39, 40, 41, \ - 42, 43, 44, 45, 46, 47, 48, 49, \ - 50, 51, 52, 53, 54, 55, 56, 57, } +#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,\ + 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,\ + 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49,\ + 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65,\ + 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81,\ + 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97,\ + 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113,\ + 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133,\ + 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153,\ + 154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173,\ + 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191, 192, 193,\ + 194, 195, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207, 208, 209} #define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 14 -#define CONFIG_SYS_NAND_ONFI_DETECTION -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW +#define CONFIG_SYS_NAND_ECCBYTES 26 +#define CONFIG_SYS_NAND_ECCSTEPS 8 +#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ + CONFIG_SYS_NAND_ECCSTEPS) +#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW +/* END NAND Configuration. */ + #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 +/* #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 */ +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000 + +#define CONFIG_CMD_MTDPARTS + +#define CONFIG_VERSION_VARIABLE /* monitor functions : u-boot version */ +#define CONFIG_CMD_DIAG /* monitor functions : Diagnostics */ #define MTDIDS_DEFAULT "nand0=omap2-nand.0" -#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:128k(SPL)," \ - "128k(SPL.backup1)," \ - "128k(SPL.backup2)," \ - "128k(SPL.backup3),1792k(u-boot)," \ - "128k(u-boot-spl-os)," \ - "128k(u-boot-env),5m(kernel),-(rootfs)" +/* Size must be a multiple of Nand erase size (524288 b) */ +#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(SPL)," \ + "512k(SPL.backup1)," \ + "512k(SPL.backup2)," \ + "512k(SPL.backup3),1536k(u-boot)," \ + "512k(u-boot-spl-os)," \ + "512k(u-boot-env),5m(kernel),-(rootfs)" #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ +/* NAND: SPL falcon mode configs */ +#ifdef CONFIG_SPL_OS_BOOT +#define CONFIG_CMD_SPL_NAND_OFS 0x240000 /* un-assigned */ +#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 +#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 +#endif /* * USB configuration. We enable MUSB support, both for host and for @@ -168,35 +192,31 @@ */ #define CONFIG_USB_MUSB_DSPS #define CONFIG_ARCH_MISC_INIT -#define CONFIG_MUSB_GADGET -#define CONFIG_MUSB_PIO_ONLY -#define CONFIG_MUSB_DISABLE_BULK_COMBINE_SPLIT -#define CONFIG_USB_GADGET -#define CONFIG_USB_GADGET_DUALSPEED -#define CONFIG_USB_GADGET_VBUS_DRAW 2 -#define CONFIG_MUSB_HOST +#define CONFIG_USB_MUSB_PIO_ONLY +#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT #define CONFIG_AM335X_USB0 #define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL #define CONFIG_AM335X_USB1 #define CONFIG_AM335X_USB1_MODE MUSB_HOST -#if defined(CONFIG_MUSB_HOST) -#define CONFIG_CMD_USB +#if defined(CONFIG_USB_MUSB_HOST) #define CONFIG_USB_STORAGE #endif #if defined(CONFIG_SPL_BUILD) /* disable host part of MUSB in SPL */ -#undef CONFIG_MUSB_HOST /* Disable CPSW SPL support so we fit within the 101KiB limit. */ #undef CONFIG_SPL_ETH_SUPPORT #endif +/* CPSW ethernet */ +#define CONFIG_NET_MULTI + /* Network */ -#define CONFIG_CMD_MII #define CONFIG_PHYLIB #define CONFIG_PHY_RESET 1 #define CONFIG_PHY_NATSEMI +#define CONFIG_PHY_REALTEK /* CPSW support */ #define CONFIG_SPL_ETH_SUPPORT