X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fpm9g45.h;h=0e944d871ff42cdf02b7b21b5fdda3fdc150b100;hb=e8009beff6d5c55c1bf1ae8184791f167e6378b0;hp=460933f79da24e8e3e667f49646eba9d01787027;hpb=5675b509165b67465a20e5cf71e07f40b449ef0c;p=u-boot diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index 460933f79d..0e944d871f 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -10,23 +10,7 @@ * * Configuation settings for the PM9G45 board. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -47,7 +31,6 @@ /* ARM asynchronous clock */ #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ -#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_TEXT_BASE 0x73f00000 #define CONFIG_ARCH_CPU_INIT @@ -71,10 +54,9 @@ /* LED */ #define CONFIG_AT91_LED -#define CONFIG_RED_LED AT91_PIO_PORTD, 31 /* this is the user1 led */ -#define CONFIG_GREEN_LED AT91_PIO_PORTD, 0 /* this is the user2 led */ +#define CONFIG_RED_LED GPIO_PIN_PD(31) /* this is the user1 led */ +#define CONFIG_GREEN_LED GPIO_PIN_PD(0) /* this is the user2 led */ -#define CONFIG_BOOTDELAY 3 /* * BOOTP options @@ -87,15 +69,7 @@ /* * Command line configuration. */ -#include -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMLS - -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_PING 1 -#define CONFIG_CMD_DHCP 1 #define CONFIG_CMD_NAND 1 -#define CONFIG_CMD_USB 1 #define CONFIG_CMD_JFFS2 1 #define CONFIG_JFFS2_CMDLINE 1 @@ -111,7 +85,6 @@ /* NOR flash, not available */ #define CONFIG_SYS_NO_FLASH 1 -#undef CONFIG_CMD_FLASH /* NAND flash */ #ifdef CONFIG_CMD_NAND @@ -123,8 +96,8 @@ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTC, 14 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTD, 3 +#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PC(14) +#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(3) #endif @@ -136,6 +109,7 @@ /* USB */ #define CONFIG_USB_ATMEL +#define CONFIG_USB_ATMEL_CLK_SEL_UPLL #define CONFIG_USB_OHCI_NEW 1 #define CONFIG_DOS_PARTITION 1 #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 @@ -168,7 +142,6 @@ #define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_PROMPT "U-Boot> " #define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ @@ -176,7 +149,6 @@ #define CONFIG_SYS_LONGHELP 1 #define CONFIG_CMDLINE_EDITING 1 #define CONFIG_AUTO_COMPLETE -#define CONFIG_SYS_HUSH_PARSER /* * Size of malloc() pool