X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fpm9g45.h;h=0e944d871ff42cdf02b7b21b5fdda3fdc150b100;hb=fc5d54b7fa3fa602e06e2f0863c0b134d6afca70;hp=e0c388e70c687910a6f30fa96e1d8d0aad499ecd;hpb=60390d70be7336b2441f5f69bd4f5affa83d064d;p=u-boot diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index e0c388e70c..0e944d871f 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -54,10 +54,9 @@ /* LED */ #define CONFIG_AT91_LED -#define CONFIG_RED_LED AT91_PIO_PORTD, 31 /* this is the user1 led */ -#define CONFIG_GREEN_LED AT91_PIO_PORTD, 0 /* this is the user2 led */ +#define CONFIG_RED_LED GPIO_PIN_PD(31) /* this is the user1 led */ +#define CONFIG_GREEN_LED GPIO_PIN_PD(0) /* this is the user2 led */ -#define CONFIG_BOOTDELAY 3 /* * BOOTP options @@ -70,15 +69,7 @@ /* * Command line configuration. */ -#include -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMLS - -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_PING 1 -#define CONFIG_CMD_DHCP 1 #define CONFIG_CMD_NAND 1 -#define CONFIG_CMD_USB 1 #define CONFIG_CMD_JFFS2 1 #define CONFIG_JFFS2_CMDLINE 1 @@ -94,7 +85,6 @@ /* NOR flash, not available */ #define CONFIG_SYS_NO_FLASH 1 -#undef CONFIG_CMD_FLASH /* NAND flash */ #ifdef CONFIG_CMD_NAND @@ -106,8 +96,8 @@ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTC, 14 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTD, 3 +#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PC(14) +#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(3) #endif @@ -152,7 +142,6 @@ #define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_PROMPT "U-Boot> " #define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ @@ -160,7 +149,6 @@ #define CONFIG_SYS_LONGHELP 1 #define CONFIG_CMDLINE_EDITING 1 #define CONFIG_AUTO_COMPLETE -#define CONFIG_SYS_HUSH_PARSER /* * Size of malloc() pool