X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fpm9g45.h;h=22b3c2e2d16bf39958c274f0be4c69fe07996ada;hb=3098e539d6a67df9f2a3c402d62147fa10422150;hp=7d16bd8b2502e51a133d6a36d297a1125f6b30c9;hpb=3be2bdf5dc69b3142c1162a59bc67191c9077567;p=u-boot diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index 7d16bd8b25..22b3c2e2d1 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -25,13 +25,11 @@ #define CONFIG_PM9G45 1 /* It's an Ronetix PM9G45 */ #define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9G45" -#define MACH_TYPE_PM9G45 2672 #define CONFIG_MACH_TYPE MACH_TYPE_PM9G45 /* ARM asynchronous clock */ #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ -#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_TEXT_BASE 0x73f00000 #define CONFIG_ARCH_CPU_INIT @@ -41,7 +39,6 @@ #define CONFIG_INITRD_TAG 1 #define CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_BOARD_EARLY_INIT_F /* * Hardware drivers @@ -55,10 +52,9 @@ /* LED */ #define CONFIG_AT91_LED -#define CONFIG_RED_LED AT91_PIO_PORTD, 31 /* this is the user1 led */ -#define CONFIG_GREEN_LED AT91_PIO_PORTD, 0 /* this is the user2 led */ +#define CONFIG_RED_LED GPIO_PIN_PD(31) /* this is the user1 led */ +#define CONFIG_GREEN_LED GPIO_PIN_PD(0) /* this is the user2 led */ -#define CONFIG_BOOTDELAY 3 /* * BOOTP options @@ -71,15 +67,7 @@ /* * Command line configuration. */ -#include -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMLS - -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_PING 1 -#define CONFIG_CMD_DHCP 1 #define CONFIG_CMD_NAND 1 -#define CONFIG_CMD_USB 1 #define CONFIG_CMD_JFFS2 1 #define CONFIG_JFFS2_CMDLINE 1 @@ -93,10 +81,6 @@ #define PHYS_SDRAM 0x70000000 #define PHYS_SDRAM_SIZE 0x08000000 /* 128 megs */ -/* NOR flash, not available */ -#define CONFIG_SYS_NO_FLASH 1 -#undef CONFIG_CMD_FLASH - /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_NAND_ATMEL @@ -107,8 +91,8 @@ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTC, 14 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTD, 3 +#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PC(14) +#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(3) #endif @@ -120,13 +104,12 @@ /* USB */ #define CONFIG_USB_ATMEL +#define CONFIG_USB_ATMEL_CLK_SEL_UPLL #define CONFIG_USB_OHCI_NEW 1 -#define CONFIG_DOS_PARTITION 1 #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00700000 /* _UHP_OHCI_BASE */ #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g45" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#define CONFIG_USB_STORAGE 1 /* board specific(not enough SRAM) */ #define CONFIG_AT91SAM9G45_LCD_BASE PHYS_SDRAM + 0xE00000 @@ -150,9 +133,6 @@ "2M(linux)ro,-(root) rw " \ "rootfstype=jffs2" -#define CONFIG_BAUDRATE 115200 - -#define CONFIG_SYS_PROMPT "U-Boot> " #define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ @@ -160,7 +140,6 @@ #define CONFIG_SYS_LONGHELP 1 #define CONFIG_CMDLINE_EDITING 1 #define CONFIG_AUTO_COMPLETE -#define CONFIG_SYS_HUSH_PARSER /* * Size of malloc() pool