X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fqemu-arm.h;h=095aec28b1598ada38c28016efc826c102abf31d;hb=7514ed33d21318edb5d28ab0f4afc23625fd3530;hp=c8852cef349c0baff60a9f82f31270648d51a4fa;hpb=b55c89ce0207d3a504238c1b8f268c56035656a3;p=u-boot

diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h
index c8852cef34..095aec28b1 100644
--- a/include/configs/qemu-arm.h
+++ b/include/configs/qemu-arm.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (c) 2017 Tuomas Tynkkynen
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -10,7 +9,6 @@
 #include <linux/sizes.h>
 
 /* Physical memory map */
-#define CONFIG_SYS_TEXT_BASE		0x00000000
 
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_SDRAM_BASE		0x40000000
@@ -20,14 +18,8 @@
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + SZ_2M)
 #define CONFIG_SYS_MALLOC_LEN		SZ_16M
 
-/* QEMU's PL011 serial port is detected via FDT using the device model */
-#define CONFIG_PL01X_SERIAL
-
-/* QEMU implements a 62.5MHz architected timer */
-/* FIXME: can we rely on CNTFREQ instead of hardcoding this fact here? */
-#define CONFIG_SYS_ARCH_TIMER
+/* For timer, QEMU emulates an ARMv7/ARMv8 architected timer */
 #define CONFIG_SYS_HZ                       1000
-#define CONFIG_SYS_HZ_CLOCK                 62500000
 
 /* For block devices, QEMU emulates an ICH9 AHCI controller over PCI */
 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 6
@@ -35,8 +27,6 @@
 /* Environment options */
 #define CONFIG_ENV_SIZE				SZ_64K
 
-#include <config_distro_defaults.h>
-
 #define BOOT_TARGET_DEVICES(func) \
 	func(SCSI, scsi, 0)
 
@@ -53,4 +43,6 @@
 	"ramdisk_addr_r=0x44000000\0" \
 	BOOTENV
 
+#define CONFIG_SYS_CBSIZE 512
+
 #endif /* __CONFIG_H */