X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fr2dplus.h;h=2d1e56aeb8d4d75f60a3055bd34f2ae8f4ec4c3c;hb=362b96cb86dcdd4fc4d76a503a1c7f3d46706c9b;hp=37d4fff9b1cf67c887068ef0931941aa8b00e436;hpb=890d242facc4079ed21e979ced2e8c6d6974f6d3;p=u-boot diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 37d4fff9b1..2d1e56aeb8 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -3,8 +3,6 @@ #undef DEBUG -#define CONFIG_SH 1 -#define CONFIG_SH4 1 #define CONFIG_CPU_SH7751 1 #define CONFIG_CPU_SH_TYPE_R 1 #define CONFIG_R2DPLUS 1 @@ -13,23 +11,19 @@ /* * Command line configuration. */ -#include - -#define CONFIG_CMD_DFL #define CONFIG_CMD_CACHE -#define CONFIG_CMD_FLASH #define CONFIG_CMD_PCI -#define CONFIG_CMD_NET #define CONFIG_CMD_PING #define CONFIG_CMD_IDE #define CONFIG_CMD_EXT2 #define CONFIG_DOS_PARTITION +#define CONFIG_CMD_SH_ZIMAGEBOOT /* SCIF */ #define CONFIG_SCIF_CONSOLE 1 #define CONFIG_BAUDRATE 115200 #define CONFIG_CONS_SCIF1 1 -#define BOARD_LATE_INIT 1 +#define CONFIG_BOARD_LATE_INIT #define CONFIG_BOOTDELAY -1 #define CONFIG_BOOTARGS "console=ttySC0,115200" @@ -39,17 +33,15 @@ #define CONFIG_SYS_SDRAM_BASE (0x8C000000) #define CONFIG_SYS_SDRAM_SIZE (0x04000000) +#define CONFIG_SYS_TEXT_BASE 0x0FFC0000 #define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_PROMPT "=> " #define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_PBSIZE 256 #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_BARGSIZE 512 -/* List of legal baudrate settings for this board */ -#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 } #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) -#define CONFIG_SYS_MEMTEST_END (TEXT_BASE - 0x100000) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024) /* Address of u-boot image in Flash */ @@ -57,8 +49,6 @@ #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */ #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) -/* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_SIZE (256) #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* @@ -80,8 +70,9 @@ * SuperH Clock setting */ #define CONFIG_SYS_CLK_FREQ 60000000 -#define TMU_CLK_DIVIDER 4 -#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER) +#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ +#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ +#define CONFIG_SYS_TMU_CLK_DIV 4 #define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */ /* @@ -96,6 +87,7 @@ #define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */ #define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */ #define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */ +#define CONFIG_IDE_SWAP_IO /* * SuperH PCI Bridge Configration @@ -121,7 +113,6 @@ /* * Network device (RTL8139) support */ -#define CONFIG_NET_MULTI #define CONFIG_RTL8139 #endif /* __CONFIG_H */