X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Frcar-gen3-common.h;h=304478af073269cbdb107f22a88e8fdc91eac252;hb=2dea3b3e7b281f6b3b9fde318749212e02b3e0a2;hp=1e9752b5f25941bd390bb1732198b442f4ff96ba;hpb=c14d4b0051df5f569fa33d9937af1db267ed6d34;p=u-boot

diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h
index 1e9752b5f2..304478af07 100644
--- a/include/configs/rcar-gen3-common.h
+++ b/include/configs/rcar-gen3-common.h
@@ -2,7 +2,7 @@
  * include/configs/rcar-gen3-common.h
  *	This file is R-Car Gen3 common configuration file.
  *
- * Copyright (C) 2015 Renesas Electronics Corporation
+ * Copyright (C) 2015-2017 Renesas Electronics Corporation
  *
  * SPDX-License-Identifier: GPL-2.0+
  */
@@ -12,7 +12,6 @@
 
 #include <asm/arch/rmobile.h>
 
-#define CONFIG_CMD_DFL
 #define CONFIG_CMD_SDRAM
 #define CONFIG_CMD_FAT
 #define CONFIG_CMD_EXT2
@@ -27,7 +26,6 @@
 
 /* Support File sytems */
 #define CONFIG_FAT_WRITE
-#define CONFIG_DOS_PARTITION
 #define CONFIG_SUPPORT_VFAT
 #define CONFIG_FS_EXT4
 #define CONFIG_EXT4_WRITE
@@ -38,19 +36,13 @@
 #define CONFIG_CMDLINE_EDITING
 #define CONFIG_OF_LIBFDT
 
-#define CONFIG_BAUDRATE		115200
-
 #undef	CONFIG_SHOW_BOOT_PROGRESS
 
 #define CONFIG_ARCH_CPU_INIT
-#define CONFIG_BOARD_EARLY_INIT_F
 
 #define CONFIG_SH_GPIO_PFC
 
 /* console */
-#undef  CONFIG_SYS_CONSOLE_INFO_QUIET
-#undef  CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
-#undef  CONFIG_SYS_CONSOLE_ENV_OVERWRITE
 
 #define CONFIG_SYS_LONGHELP
 #define CONFIG_SYS_CBSIZE		256
@@ -60,13 +52,34 @@
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200, 38400 }
 
 /* MEMORY */
-#define CONFIG_SYS_TEXT_BASE		0x49000000
+#define CONFIG_SYS_TEXT_BASE		0x50000000
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE + 0x7fff0)
 
-#define CONFIG_SYS_SDRAM_BASE		(0x48000000)
-#define CONFIG_SYS_SDRAM_SIZE		(1024u * 1024 * 1024 - 0x08000000)
-#define CONFIG_SYS_LOAD_ADDR		(0x48080000)
-#define CONFIG_NR_DRAM_BANKS		1
+#define DRAM_RSV_SIZE			0x08000000
+#if defined(CONFIG_R8A7795)
+#define CONFIG_NR_DRAM_BANKS		4
+#define PHYS_SDRAM_1			(0x40000000 + DRAM_RSV_SIZE)
+#define PHYS_SDRAM_1_SIZE		(0x40000000u - DRAM_RSV_SIZE)
+#define PHYS_SDRAM_2			0x500000000
+#define PHYS_SDRAM_2_SIZE		0x40000000u
+#define PHYS_SDRAM_3			0x600000000
+#define PHYS_SDRAM_3_SIZE		0x40000000u
+#define PHYS_SDRAM_4			0x700000000
+#define PHYS_SDRAM_4_SIZE		0x40000000u
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define CONFIG_SYS_SDRAM_SIZE		PHYS_SDRAM_1_SIZE
+#elif defined(CONFIG_R8A7796)
+#define CONFIG_NR_DRAM_BANKS		2
+#define PHYS_SDRAM_1			(0x40000000 + DRAM_RSV_SIZE)
+#define PHYS_SDRAM_1_SIZE		(0x80000000u - DRAM_RSV_SIZE)
+#define PHYS_SDRAM_2			0x0600000000
+#define PHYS_SDRAM_2_SIZE		0x80000000u
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define CONFIG_SYS_SDRAM_SIZE		PHYS_SDRAM_1_SIZE
+#endif
+#define CONFIG_SYS_LOAD_ADDR		0x48080000
+#define CONFIG_VERY_BIG_RAM
+#define CONFIG_MAX_MEM_MAPPED		CONFIG_SYS_SDRAM_SIZE
 
 #define CONFIG_SYS_MONITOR_BASE		0x00000000
 #define CONFIG_SYS_MONITOR_LEN		(256 * 1024)