X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fredwood.h;h=f75ab6781826455266bf1bf963ecafcd8d70e0fa;hb=7842fb7c4f5be961c7aa9091dc8c760683b1377c;hp=4b744a79499f757040f721f0239c4f884f6f8ce9;hpb=cb5473205206c7f14cbb1e747f28ec75b48826e2;p=u-boot

diff --git a/include/configs/redwood.h b/include/configs/redwood.h
index 4b744a7949..f75ab67818 100644
--- a/include/configs/redwood.h
+++ b/include/configs/redwood.h
@@ -33,6 +33,8 @@
 #define CONFIG_460SX			1	/* ... PPC460 family	*/
 #define CONFIG_BOARD_EARLY_INIT_F	1	/* Call board_pre_init	*/
 
+#define	CONFIG_SYS_TEXT_BASE	0xfffb0000
+
 /*-----------------------------------------------------------------------
  * Include common defines/options for all AMCC boards
  *----------------------------------------------------------------------*/
@@ -47,7 +49,6 @@
  * actual resources get mapped (not physical addresses)
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_FLASH_BASE		0xfff00000	/* start of FLASH	*/
-#define CONFIG_SYS_PERIPHERAL_BASE	0xa0000000	/* internal peripherals	*/
 #define CONFIG_SYS_ISRAM_BASE		0x90000000	/* internal SRAM	*/
 
 #define CONFIG_SYS_PCI_BASE		0xd0000000	/* internal PCI regs	*/
@@ -77,18 +78,21 @@
 #define CONFIG_SYS_FPGA_BASE		0xe2000000	/* epld			*/
 #define CONFIG_SYS_OPER_FLASH		0xe7000000	/* SRAM - OPER Flash	*/
 
+/*
+ * Serial Port
+ */
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+
 /*-----------------------------------------------------------------------
  * Initial RAM & stack pointer (placed in internal SRAM)
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_TEMP_STACK_OCM	1
 #define CONFIG_SYS_OCM_DATA_ADDR	CONFIG_SYS_ISRAM_BASE
 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_ISRAM_BASE	/* Initial RAM address	*/
-#define CONFIG_SYS_INIT_RAM_END	0x2000		/* End of used area in RAM */
-#define CONFIG_SYS_GBL_DATA_SIZE	128		/* num bytes initial data */
+#define CONFIG_SYS_INIT_RAM_SIZE	0x2000		/* Size of used area in RAM */
 
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_POST_WORD_ADDR
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
 
 /*-----------------------------------------------------------------------
  * DDR SDRAM