X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fsbc2410x.h;h=eab9629c077ce83f413024d9c55cb2a48abcd1da;hb=bb272ec8df6e35b7e19ce1237cae28798167a624;hp=b4a063a1d4c6ad3c199b0b41e917dc4e27265aa6;hpb=2c4faea84f3d96d674e3c065e1f220b20c8930c0;p=u-boot diff --git a/include/configs/sbc2410x.h b/include/configs/sbc2410x.h index b4a063a1d4..eab9629c07 100644 --- a/include/configs/sbc2410x.h +++ b/include/configs/sbc2410x.h @@ -2,7 +2,7 @@ * (C) Copyright 2002 * Sysgo Real-Time Solutions, GmbH * Marius Groeger - * Gary Jennejohn + * Gary Jennejohn * David Mueller * * Modified for the friendly-arm SBC-2410X by @@ -57,8 +57,8 @@ /* * Size of malloc() pool */ -#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) -#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ /* * Hardware drivers @@ -70,6 +70,7 @@ /* * select serial console configuration */ +#define CONFIG_S3C24X0_SERIAL #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SBC2410X */ /************************************************************ @@ -103,11 +104,12 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF #define CONFIG_CMD_PING -#define CONFIG_CMD_REGINFO #define CONFIG_BOOTDELAY 3 -#define CONFIG_BOOTARGS "console=ttySAC0 root=/dev/nfs nfsroot=192.168.0.1:/friendly-arm/rootfs_netserv ip=192.168.0.69:192.168.0.1:192.168.0.1:255.255.255.0:debian:eth0:off" +#define CONFIG_BOOTARGS "console=ttySAC0 root=/dev/nfs " \ + "nfsroot=192.168.0.1:/friendly-arm/rootfs_netserv " \ + "ip=192.168.0.69:192.168.0.1:192.168.0.1:255.255.255.0:debian:eth0:off" #define CONFIG_ETHADDR 08:00:3e:26:0a:5b #define CONFIG_NETMASK 255.255.255.0 #define CONFIG_IPADDR 192.168.0.69 @@ -124,26 +126,24 @@ /* * Miscellaneous configurable options */ -#define CFG_LONGHELP /* undef to save memory */ -#define CFG_PROMPT "[ ~ljh@GDLC ]# " /* Monitor Command Prompt */ -#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ -#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ -#define CFG_MAXARGS 16 /* max number of command args */ -#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "[ ~ljh@GDLC ]# " /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#define CFG_MEMTEST_START 0x30000000 /* memtest works on */ -#define CFG_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */ +#define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */ -#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ - -#define CFG_LOAD_ADDR 0x33000000 /* default load address */ +#define CONFIG_SYS_LOAD_ADDR 0x33000000 /* default load address */ /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */ /* it to wrap 100 times (total 1562500) to get 1 sec. */ -#define CFG_HZ 1562500 +#define CONFIG_SYS_HZ 1562500 /* valid baudrates */ -#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /*----------------------------------------------------------------------- * Stack sizes @@ -165,7 +165,7 @@ #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ -#define CFG_FLASH_BASE PHYS_FLASH_1 +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 /*----------------------------------------------------------------------- * FLASH and environment organization @@ -174,41 +174,41 @@ #define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */ -#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ #ifdef CONFIG_AMD_LV800 #define PHYS_FLASH_SIZE 0x00100000 /* 1MB */ -#define CFG_MAX_FLASH_SECT (19) /* max number of sectors on one chip */ -#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x0F0000) /* addr of environment */ +#define CONFIG_SYS_MAX_FLASH_SECT (19) /* max number of sectors on one chip */ +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */ #endif #ifdef CONFIG_AMD_LV400 #define PHYS_FLASH_SIZE 0x00080000 /* 512KB */ -#define CFG_MAX_FLASH_SECT (11) /* max number of sectors on one chip */ -#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x070000) /* addr of environment */ +#define CONFIG_SYS_MAX_FLASH_SECT (11) /* max number of sectors on one chip */ +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000) /* addr of environment */ #endif /* timeout values are in ticks */ -#define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* Timeout for Flash Erase */ -#define CFG_FLASH_WRITE_TOUT (5*CFG_HZ) /* Timeout for Flash Write */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ +#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */ -#define CFG_ENV_IS_IN_FLASH 1 -#define CFG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */ +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */ /*----------------------------------------------------------------------- * NAND flash settings */ #if defined(CONFIG_CMD_NAND) -#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ +#define CONFIG_NAND_S3C2410 +#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define SECTORSIZE 512 #define ADDR_COLUMN 1 #define ADDR_PAGE 2 #define ADDR_COLUMN_PAGE 3 -#define NAND_ChipID_UNKNOWN 0x00 +#define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 -#define NAND_MAX_CHIPS 1 #define NAND_WAIT_READY(nand) NF_WaitRB() #define NAND_DISABLE_CE(nand) NF_SetCE(NFCE_HIGH) @@ -230,8 +230,8 @@ #define CONFIG_INITRD_TAG #define CONFIG_CMDLINE_TAG -#define CFG_HUSH_PARSER -#define CFG_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_CMDLINE_EDITING