X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fsc520_cdp.h;h=2f1dae729cd366cba7ff99960d8dfc79aab00014;hb=5c1a1a3069c194ac6509344e58f8c96779d2d197;hp=9f2357b0b6072ef581a95db264f734acaa77e7d1;hpb=156feb90d200f186cdfd856d7f6f1878bb1bec1e;p=u-boot diff --git a/include/configs/sc520_cdp.h b/include/configs/sc520_cdp.h index 9f2357b0b6..2f1dae729c 100644 --- a/include/configs/sc520_cdp.h +++ b/include/configs/sc520_cdp.h @@ -28,14 +28,15 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define GRUSS_TESTING +#define CONFIG_SKIP_RELOCATE_UBOOT + /* * High Level Configuration Options * (easy to change) */ #define CONFIG_X86 1 /* This is a X86 CPU */ -#define CONFIG_SC520 1 /* Include support for AMD SC520 */ +#define CONFIG_SYS_SC520 1 /* Include support for AMD SC520 */ #define CONFIG_ALI152X 1 /* Include support for Ali 152x SIO */ #define CONFIG_SYS_SDRAM_PRECHARGE_DELAY 6 /* 6T */ @@ -47,12 +48,14 @@ #define CONFIG_SYS_SDRAM_CAS_LATENCY_3T #define CONFIG_SYS_SC520_HIGH_SPEED 0 /* 100 or 133MHz */ -#undef CONFIG_SYS_RESET_SC520 /* use SC520 MMCR's to reset cpu */ -#undef CONFIG_SYS_TIMER_SC520 /* use SC520 swtimers */ -#define CONFIG_SYS_TIMER_GENERIC 1 /* use the i8254 PIT timers */ -#undef CONFIG_SYS_TIMER_TSC /* use the Pentium TSC timers */ +#undef CONFIG_SYS_SC520_RESET /* use SC520 MMCR's to reset cpu */ +#undef CONFIG_SYS_SC520_TIMER /* use SC520 swtimers */ +#define CONFIG_SYS_GENERIC_TIMER 1 /* use the i8254 PIT timers */ +#undef CONFIG_SYS_TSC_TIMER /* use the Pentium TSC timers */ #define CONFIG_SYS_USE_SIO_UART 0 /* prefer the uarts on the SIO to those * in the SC520 on the CDP */ +#define CONFIG_SYS_PCAT_INTERRUPTS +#define CONFIG_SYS_NUM_IRQS 16 #define CONFIG_SYS_STACK_SIZE 0x8000 /* Size of bootloader stack */ @@ -62,7 +65,7 @@ /* * Size of malloc() pool */ -#define CONFIG_MALLOC_SIZE (CONFIG_ENV_SIZE + 128*1024) +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) #define CONFIG_BAUDRATE 9600 @@ -81,11 +84,7 @@ #include #define CONFIG_CMD_PCI -#ifndef GRUSS_TESTING #define CONFIG_CMD_SATA -#else -#undef CONFIG_CMD_SATA -#endif #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_NET #define CONFIG_CMD_EEPROM @@ -112,8 +111,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x01000000 /* 1 ... 16 MB in DRAM */ -#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ #define CONFIG_SYS_HZ 1024 /* incrementer freq: 1kHz */ @@ -147,22 +144,22 @@ #define CONFIG_SPI #define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment EEPROM 16k is SPI is used or 128 bytes if MW is used*/ #define CONFIG_ENV_OFFSET 0 -#define CONFIG_SC520_CDP_USE_SPI /* Store configuration in the SPI part */ -#undef CONFIG_SC520_CDP_USE_MW /* Store configuration in the MicroWire part */ +#define CONFIG_SYS_SC520_CDP_USE_SPI /* Store configuration in the SPI part */ +#undef CONFIG_SYS_SC520_CDP_USE_MW /* Store configuration in the MicroWire part */ #define CONFIG_SPI_X 1 /* * JFFS2 partitions */ /* No command line, one static partition, whole device */ -#undef CONFIG_JFFS2_CMDLINE +#undef CONFIG_CMD_MTDPARTS #define CONFIG_JFFS2_DEV "nor0" #define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF #define CONFIG_JFFS2_PART_OFFSET 0x00000000 /* mtdparts command line support */ /* -#define CONFIG_JFFS2_CMDLINE +#define CONFIG_CMD_MTDPARTS #define MTDIDS_DEFAULT "nor0=SC520CDP Flash Bank #0" #define MTDPARTS_DEFAULT "mtdparts=SC520CDP Flash Bank #0:-(jffs2)" */ @@ -179,17 +176,10 @@ /************************************************************ *SATA/Native Stuff ************************************************************/ -#ifndef GRUSS_TESTING #define CONFIG_SYS_SATA_MAXBUS 2 /*Max Sata buses supported */ #define CONFIG_SYS_SATA_DEVS_PER_BUS 2 /*Max no. of devices per bus/port */ #define CONFIG_SYS_SATA_MAX_DEVICE (CONFIG_SYS_SATA_MAXBUS* CONFIG_SYS_SATA_DEVS_PER_BUS) #define CONFIG_ATA_PIIX 1 /*Supports ata_piix driver */ -#else -#undef CONFIG_SYS_SATA_MAXBUS -#undef CONFIG_SYS_SATA_DEVS_PER_BUS -#undef CONFIG_SYS_SATA_MAX_DEVICE -#undef CONFIG_ATA_PIIX -#endif /************************************************************ @@ -202,11 +192,9 @@ /************************************************************ * Video/Keyboard support ************************************************************/ -#ifndef GRUSS_TESTING #define CONFIG_VIDEO /* To enable video controller support */ -#else -#undef CONFIG_VIDEO -#endif +#define PCI_VIDEO_VENDOR_ID 0 /*Use the appropriate vendor ID*/ +#define PCI_VIDEO_DEVICE_ID 0 /*Use the appropriate Device ID*/ #define CONFIG_I8042_KBD #define CONFIG_SYS_ISA_IO 0 @@ -219,7 +207,6 @@ /* * PCI stuff */ -#ifndef GRUSS_TESTING #define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_PNP /* pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW @@ -228,11 +215,6 @@ #define CONFIG_SYS_SECOND_PCI_IRQ 9 #define CONFIG_SYS_THIRD_PCI_IRQ 11 #define CONFIG_SYS_FORTH_PCI_IRQ 15 -#else -#undef CONFIG_PCI -#undef CONFIG_PCI_PNP -#undef CONFIG_PCI_SCAN_SHOW -#endif #endif /* __CONFIG_H */