X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fsilk.h;h=dca0623485ca61790f470bd436bf42da0280b5a1;hb=66669fcf809c1e3ff644b12e04e625d3737ffd8e;hp=a4235e94d0ea62cc6304c98e14b29069a422c849;hpb=a851604ca36493e8319a7d3a17594b7224d546fe;p=u-boot

diff --git a/include/configs/silk.h b/include/configs/silk.h
index a4235e94d0..dca0623485 100644
--- a/include/configs/silk.h
+++ b/include/configs/silk.h
@@ -39,20 +39,14 @@
 
 /* SCIF */
 #define CONFIG_SCIF_CONSOLE
-#define CONFIG_CONS_SCIF2
-#define CONFIG_SCIF_USE_EXT_CLK
 
 /* FLASH */
 #define CONFIG_SPI
-#define CONFIG_SPI_FLASH_BAR
 #define CONFIG_SH_QSPI
-#define CONFIG_SPI_FLASH
-#define CONFIG_SPI_FLASH_SPANSION
 #define CONFIG_SPI_FLASH_QUAD
 #define CONFIG_SYS_NO_FLASH
 
 /* SH Ether */
-#define	CONFIG_NET_MULTI
 #define CONFIG_SH_ETHER
 #define CONFIG_SH_ETHER_USE_PORT	0
 #define CONFIG_SH_ETHER_PHY_ADDR	0x1
@@ -71,12 +65,10 @@
 #define CONFIG_SH_TMU_CLK_FREQ	(CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
 #define CONFIG_PLL1_CLK_FREQ	(CONFIG_SYS_CLK_FREQ * 156 / 2)
 #define CONFIG_P_CLK_FREQ	(CONFIG_PLL1_CLK_FREQ / 24)
-#define CONFIG_SH_SCIF_CLK_FREQ	14745600 /* External Clock */
 
 #define CONFIG_SYS_TMU_CLK_DIV  4
 
 /* i2c */
-#define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_SH
 #define CONFIG_SYS_I2C_SLAVE		0x7F
@@ -99,11 +91,13 @@
 /* MMCIF */
 #define CONFIG_MMC
 #define CONFIG_GENERIC_MMC
-#define CONFIG_CMD_MMC
 #define CONFIG_SH_MMCIF
 #define CONFIG_SH_MMCIF_ADDR	0xee200000
 #define CONFIG_SH_MMCIF_CLK	48000000
 
+/* SDHI */
+#define CONFIG_SH_SDHI_FREQ	97500000
+
 /* Module stop status bits */
 /* INTC-RT */
 #define CONFIG_SMSTP0_ENA	0x00400000