X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Ftao3530.h;h=dd69d4ebabfe11ed83174fcf551dddc8c4650d05;hb=ad970756208864de4b353b77bfb04c0fb4fc5ab5;hp=9abfe829022194e720e21bd924a42d684c297e4f;hpb=a891601ce51edbafa1a2750c96a618e4fcbca1c2;p=u-boot diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h index 9abfe82902..dd69d4ebab 100644 --- a/include/configs/tao3530.h +++ b/include/configs/tao3530.h @@ -16,12 +16,11 @@ /* * High Level Configuration Options */ -#define CONFIG_ARMV7 /* This is an ARM V7 CPU core */ #define CONFIG_OMAP /* in a TI OMAP core */ -#define CONFIG_OMAP34XX /* which is a 34XX */ #define CONFIG_OMAP_GPIO #define CONFIG_OMAP_COMMON +#define CONFIG_SYS_GENERIC_BOARD #define MACH_TYPE_OMAP3_TAO3530 2836 @@ -83,6 +82,13 @@ #define CONFIG_OMAP_HSMMC #define CONFIG_DOS_PARTITION +/* GPIO banks */ +#define CONFIG_OMAP3_GPIO_2 /* GPIO32 ..63 is in GPIO bank 2 */ +#define CONFIG_OMAP3_GPIO_3 /* GPIO64 ..95 is in GPIO bank 3 */ +#define CONFIG_OMAP3_GPIO_4 /* GPIO96 ..127 is in GPIO bank 4 */ +#define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO bank 5 */ +#define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */ + /* commands to include */ #include @@ -130,10 +136,10 @@ #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ /* to access nand at */ /* CS0 */ -#define GPMC_NAND_ECC_LP_x16_LAYOUT #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ /* devices */ +#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16 /* Environment information */ #define CONFIG_BOOTDELAY 3 @@ -246,13 +252,8 @@ */ /* **** PISMO SUPPORT *** */ - -/* Configure the PISMO */ -#define PISMO1_NAND_SIZE GPMC_SIZE_128M -#define PISMO1_ONEN_SIZE GPMC_SIZE_128M - #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ -#define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE +#define CONFIG_SYS_FLASH_BASE NAND_BASE /* Monitor at start of flash */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE @@ -298,14 +299,13 @@ #define CONGIG_CMD_STORAGE /* Defines for SPL */ -#define CONFIG_SPL #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ -#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 -#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_LIBCOMMON_SUPPORT @@ -346,7 +346,6 @@ #define CONFIG_SPL_TEXT_BASE 0x40200800 #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ -#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK /* * Use 0x80008000 as TEXT_BASE here for compatibility reasons with the