X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Ftegra-common.h;h=ba6c6bb9f5f80aadd8de9c71f9b3bf66a9354749;hb=8258c126143034bef2e35e01b2e14f2d90a7e0b5;hp=036ded0c79f485230b8bd08f1a05212722f6b6dd;hpb=be08abc2429c2e9cbce3d0abc1d315171d683520;p=u-boot diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 036ded0c79..ba6c6bb9f5 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -2,23 +2,7 @@ * (C) Copyright 2010-2012 * NVIDIA Corporation * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef _TEGRA_COMMON_H_ @@ -33,8 +17,6 @@ #define CONFIG_TEGRA /* which is a Tegra generic machine */ #define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */ -#define CONFIG_SYS_CACHELINE_SIZE 32 - #include /* get chip and board defs */ /* @@ -151,6 +133,7 @@ #define CONFIG_CMD_GPIO #define CONFIG_CMD_ENTERRCM #define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD /* Defines for SPL */ #define CONFIG_SPL @@ -158,7 +141,7 @@ #define CONFIG_SPL_RAM_DEVICE #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_NAND_SIMPLE -#define CONFIG_SPL_MAX_SIZE (CONFIG_SYS_TEXT_BASE - \ +#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \ CONFIG_SPL_TEXT_BASE) #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 @@ -168,7 +151,9 @@ #define CONFIG_SPL_GPIO_SUPPORT #define CONFIG_SYS_GENERIC_BOARD + /* Misc utility code */ #define CONFIG_BOUNCE_BUFFER +#define CONFIG_CRC32_VERIFY #endif /* _TEGRA_COMMON_H_ */