X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Ftegra30-common.h;h=443c842240ede89b0e7cba4fd51b278877e95886;hb=c534d2fdcf7aa80230a0f1ed54d5e3164ba595eb;hp=99acbfd28b29de65dad657cbd556cd523322e2c2;hpb=4eef93da262048eb1118e726b3ec5b8ebd3c6c91;p=u-boot

diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h
index 99acbfd28b..443c842240 100644
--- a/include/configs/tegra30-common.h
+++ b/include/configs/tegra30-common.h
@@ -23,11 +23,6 @@
  */
 #define V_NS16550_CLK		408000000	/* 408MHz (pllp_out0) */
 
-/*
- * High Level Configuration Options
- */
-#define CONFIG_TEGRA30			/* in a NVidia Tegra30 core */
-
 /* Environment information, boards can override if required */
 #define CONFIG_LOADADDR		0x80408000	/* def. location for kernel */
 
@@ -48,6 +43,9 @@
  * scriptaddr can be pretty much anywhere that doesn't conflict with something
  *   else. Put it above BOOTMAPSZ to eliminate conflicts.
  *
+ * pxefile_addr_r can be pretty much anywhere that doesn't conflict with
+ *   something else. Put it above BOOTMAPSZ to eliminate conflicts.
+ *
  * kernel_addr_r must be within the first 128M of RAM in order for the
  *   kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will
  *   decompress itself to 0x8000 after the start of RAM, kernel_addr_r
@@ -65,6 +63,7 @@
  */
 #define MEM_LAYOUT_ENV_SETTINGS \
 	"scriptaddr=0x90000000\0" \
+	"pxefile_addr_r=0x90100000\0" \
 	"kernel_addr_r=0x81000000\0" \
 	"fdt_addr_r=0x82000000\0" \
 	"ramdisk_addr_r=0x82100000\0"
@@ -79,5 +78,7 @@
 
 /* For USB EHCI controller */
 #define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_EHCI_TXFIFO_THRESH	0x10
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
 
 #endif /* _TEGRA30_COMMON_H_ */