X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fti_am335x_common.h;h=4d2ae280e7f1433dae02581696224b2ba26ebff7;hb=4a41cc157870cf752795adef811fa7ca9cb1b974;hp=0eae9c8105a71a4de15628a1e4a15facbfc77afe;hpb=c27efde68dfd7fd2da364d556d586495e78d3396;p=u-boot diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index 0eae9c8105..4d2ae280e7 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -13,33 +13,49 @@ #define __CONFIG_TI_AM335X_COMMON_H__ #define CONFIG_AM33XX -#define CONFIG_BOARD_LATE_INIT #define CONFIG_ARCH_CPU_INIT #define CONFIG_SYS_CACHELINE_SIZE 64 #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ +#define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC + +#ifndef CONFIG_SPL_BUILD +# define CONFIG_OMAP_SERIAL +#endif #include /* NS16550 Configuration */ #define CONFIG_SYS_NS16550 +#ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE (-4) +#endif #define CONFIG_SYS_NS16550_CLK 48000000 /* Network defines. */ -#define CONFIG_CMD_NET #define CONFIG_CMD_DHCP -#define CONFIG_CMD_PING -#define CONFIG_DRIVER_TI_CPSW -#define CONFIG_MII -#define CONFIG_BOOTP_DEFAULT -#define CONFIG_BOOTP_DNS +#define CONFIG_CMD_MII +#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_SUBNETMASK #define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_CMD_PING +#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ +#define CONFIG_MII /* Required in net/eth.c */ + +/* + * RTC related defines. To use bootcount you must set bootlimit in the + * environment to a non-zero value and enable CONFIG_BOOTCOUNT_LIMIT + * in the board config. + */ +#define CONFIG_SYS_BOOTCOUNT_ADDR 0x44E3E000 + +/* Enable the HW watchdog, since we can use this with bootcount */ +#define CONFIG_HW_WATCHDOG +#define CONFIG_OMAP_WATCHDOG /* * SPL related defines. The Public RAM memory map the ROM defines the @@ -50,7 +66,11 @@ */ #define CONFIG_SPL_TEXT_BASE 0x402F0400 #define CONFIG_SPL_MAX_SIZE (0x4030B800 - CONFIG_SPL_TEXT_BASE) -#define CONFIG_SPL_YMODEM_SUPPORT +#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ + (128 << 20)) + +/* Enable the watchdog inside of SPL */ +#define CONFIG_SPL_WATCHDOG_SUPPORT /* * Since SPL did pll and ddr initialization for us, @@ -60,6 +80,19 @@ #define CONFIG_SKIP_LOWLEVEL_INIT #endif +/* + * When building U-Boot such that there is no previous loader + * we need to call board_early_init_f. This is taken care of in + * s_init when we have SPL used. + */ +#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && !defined(CONFIG_SPL) +#define CONFIG_BOARD_EARLY_INIT_F +#endif + +#ifdef CONFIG_NAND +#define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */ +#endif + /* Now bring in the rest of the common code. */ #include