X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Ftitanium.h;h=cc655f296007481e30c1d8b971bc2d677af8ace8;hb=87da89e803610770390d81dc6d8b6edb909f16d6;hp=7490fa8bed32ace047549a42c2d51c2462045789;hpb=9bea236b3402a262772b66d055ec6431cbd3ba87;p=u-boot diff --git a/include/configs/titanium.h b/include/configs/titanium.h index 7490fa8bed..cc655f2960 100644 --- a/include/configs/titanium.h +++ b/include/configs/titanium.h @@ -17,22 +17,22 @@ #define CONFIG_MX6Q -#define MACH_TYPE_TITANIUM 3769 -#define CONFIG_MACH_TYPE MACH_TYPE_TITANIUM +/* Provide the MACH_TYPE value that the vendor kernel requires. */ +#define CONFIG_MACH_TYPE 3769 /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024) -#define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_MISC_INIT_R #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE /* I2C Configs */ -#define CONFIG_CMD_I2C #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ #define CONFIG_SYS_I2C_SPEED 100000 @@ -40,31 +40,17 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_USDHC_NUM 1 -#define CONFIG_CMD_PING -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_MII -#define CONFIG_CMD_NET #define CONFIG_FEC_MXC #define CONFIG_MII #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 4 -#define CONFIG_PHYLIB -#define CONFIG_PHY_MICREL -#define CONFIG_PHY_MICREL_KSZ9021 /* USB Configs */ -#define CONFIG_CMD_USB -#define CONFIG_USB_EHCI -#define CONFIG_USB_EHCI_MX6 -#define CONFIG_USB_STORAGE #define CONFIG_MXC_USB_PORT 1 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -/* Miscellaneous commands */ -#define CONFIG_CMD_BMODE - #define CONFIG_SYS_MEMTEST_START 0x10000000 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (500 << 20)) @@ -72,10 +58,6 @@ #define CONFIG_UBI_PART ubi #define CONFIG_UBIFS_VOLUME rootfs0 -#define MTDIDS_DEFAULT "nand0=gpmi-nand" -#define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:16M(uboot),512k(env1)," \ - "512k(env2),-(ubi)" - #define CONFIG_EXTRA_ENV_SETTINGS \ "kernel=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ "kernel_fs=/boot/uImage\0" \ @@ -121,8 +103,8 @@ "upd_ubifs=run load_ubifs update_ubifs\0" \ "init_ubi=nand erase.part ubi;ubi part ${part};" \ "ubi create ${vol} c800000\0" \ - "mtdids=" MTDIDS_DEFAULT "\0" \ - "mtdparts=" MTDPARTS_DEFAULT "\0" \ + "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip" \ " addcon addmtd;" \ "bootm ${kernel_addr} - ${dtb_addr}\0" \ @@ -142,13 +124,6 @@ #define CONFIG_BOOTCOMMAND "run nand_ubifs" -/* Miscellaneous configurable options */ -#define CONFIG_SYS_PROMPT "Titanium > " - -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR @@ -164,10 +139,6 @@ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* Enable NAND support */ -#define CONFIG_CMD_NAND -#define CONFIG_CMD_NAND_TRIMFFS -#define CONFIG_CMD_TIME - #ifdef CONFIG_CMD_NAND /* NAND stuff */ @@ -183,7 +154,6 @@ #define CONFIG_APBH_DMA_BURST8 /* Environment in NAND */ -#define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET (16 << 20) #define CONFIG_ENV_SECT_SIZE (128 << 10) #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE @@ -194,19 +164,13 @@ /* Environment in MMC */ #define CONFIG_ENV_SIZE (8 << 10) -#define CONFIG_ENV_IS_IN_MMC #define CONFIG_ENV_OFFSET (6 * 64 * 1024) #define CONFIG_SYS_MMC_ENV_DEV 0 #endif /* CONFIG_CMD_NAND */ /* UBI/UBIFS config options */ -#define CONFIG_LZO #define CONFIG_MTD_DEVICE #define CONFIG_MTD_PARTITIONS -#define CONFIG_RBTREE -#define CONFIG_CMD_MTDPARTS -#define CONFIG_CMD_UBI -#define CONFIG_CMD_UBIFS #endif /* __CONFIG_H */