X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Futx8245.h;h=5be62ecb2d4dae6ceb6acff1cdec7b1422472375;hb=b1cdd8baa14f518288ceddb391d6587c1ecb3174;hp=6e9c27c1e1b3d43bd1c58b7d2c8dada4f8d48b45;hpb=f82642e33899766892499b163e60560fbbf87773;p=u-boot

diff --git a/include/configs/utx8245.h b/include/configs/utx8245.h
index 6e9c27c1e1..5be62ecb2d 100644
--- a/include/configs/utx8245.h
+++ b/include/configs/utx8245.h
@@ -7,23 +7,7 @@
  * Matthew E. Karger, karger@arlut.utexas.edu
  * Applied Research Laboratories, The University of Texas at Austin
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 /*
@@ -46,16 +30,17 @@
  * (easy to change)
  */
 
-#define CONFIG_MPC824X		1
 #define CONFIG_MPC8245		1
 #define CONFIG_UTX8245		1
+
+#define	CONFIG_SYS_TEXT_BASE	0xFFF00000
+
 #define DEBUG				1
 
 #define CONFIG_IDENT_STRING     " [UTX5] "
 
 #define CONFIG_CONS_INDEX	1
 #define CONFIG_BAUDRATE		57600
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
 
 #define CONFIG_BOOTDELAY	2
 #define CONFIG_AUTOBOOT_PROMPT	"autoboot in %d seconds\n", bootdelay
@@ -63,7 +48,6 @@
 #define CONFIG_BOOTARGS		"root=/dev/ram console=ttyS0,57600" /* RAMdisk */
 #define CONFIG_ETHADDR		00:AA:00:14:00:05	/* UTX5 */
 #define CONFIG_SERVERIP		10.8.17.105	/* Spree */
-#define CONFIG_SYS_TFTP_LOADADDR	10000
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"kernel_addr=FFA00000\0" \
@@ -105,7 +89,7 @@ protect on ${u-boot_startaddr} ${u-boot_endaddr}"
 #define CONFIG_CMD_PCI
 #define CONFIG_CMD_FLASH
 #define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_ENV
+#define CONFIG_CMD_SAVEENV
 #define CONFIG_CMD_CONSOLE
 #define CONFIG_CMD_LOADS
 #define CONFIG_CMD_LOADB
@@ -122,7 +106,6 @@ protect on ${u-boot_startaddr} ${u-boot_endaddr}"
  * Miscellaneous configurable options
  */
 #define CONFIG_SYS_LONGHELP				/* undef to save memory		*/
-#define CONFIG_SYS_PROMPT	"=> "			/* Monitor Command Prompt	*/
 #define CONFIG_SYS_CBSIZE	256				/* Console I/O Buffer Size	*/
 
 /* Print Buffer Size */
@@ -138,9 +121,9 @@ protect on ${u-boot_startaddr} ${u-boot_endaddr}"
  *-----------------------------------------------------------------------
  */
 #define CONFIG_PCI				/* include pci support		*/
+#define	CONFIG_PCI_INDIRECT_BRIDGE 1	/* indirect PCI bridge support */
 #undef CONFIG_PCI_PNP
 #define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_NET_MULTI
 #define CONFIG_EEPRO100
 #define CONFIG_SYS_RX_ETH_BUFFER	8               /* use 8 rx buffer on eepro100  */
 #define CONFIG_EEPRO100_SROM_WRITE
@@ -176,7 +159,7 @@ protect on ${u-boot_startaddr} ${u-boot_endaddr}"
 
 #define CONFIG_SYS_EUMB_ADDR	    0xFC000000
 
-#define CONFIG_SYS_MONITOR_BASE    TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
 
 #define CONFIG_SYS_MONITOR_LEN	    (256 << 10) /* Reserve 256 kB for Monitor	*/
 #define CONFIG_SYS_MALLOC_LEN	    (128 << 10) /* Reserve 128 kB for malloc()	*/
@@ -193,10 +176,9 @@ protect on ${u-boot_startaddr} ${u-boot_endaddr}"
 #define CONFIG_SYS_INIT_DATA_SIZE    128	/* Size in bytes reserved for */
 									/* initial data */
 #define CONFIG_SYS_INIT_RAM_ADDR     0x40000000
-#define CONFIG_SYS_INIT_RAM_END      0x1000
-#define CONFIG_SYS_INIT_DATA_OFFSET  (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_INIT_DATA_SIZE)
-#define CONFIG_SYS_GBL_DATA_SIZE	128
-#define CONFIG_SYS_GBL_DATA_OFFSET  (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE      0x1000
+#define CONFIG_SYS_INIT_DATA_OFFSET  (CONFIG_SYS_INIT_RAM_SIZE - CONFIG_SYS_INIT_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET  (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 
 /*--------------------------------------------------------------------
  * NS16550 Configuration
@@ -225,7 +207,6 @@ protect on ${u-boot_startaddr} ${u-boot_endaddr}"
  *------------------------------------------------------------------*/
 
 #define CONFIG_SYS_CLK_FREQ  33000000
-#define CONFIG_SYS_HZ				1000
 
 /*#define CONFIG_SYS_ETH_DEV_FN	     0x7800 */
 /*#define CONFIG_SYS_ETH_IOBASE	     0x00104000 */
@@ -235,8 +216,7 @@ protect on ${u-boot_startaddr} ${u-boot_endaddr}"
  *------------------------------------------------------------------*/
 #if 1
 #define CONFIG_HARD_I2C		1		/* To enable I2C support	*/
-#undef  CONFIG_SOFT_I2C				/* I2C bit-banged		*/
-#define CONFIG_SYS_I2C_SPEED		400000		/* I2C speed and slave address	*/
+#define CONFIG_SYS_I2C_SPEED		400000
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 #endif
 
@@ -425,13 +405,4 @@ protect on ${u-boot_startaddr} ${u-boot_endaddr}"
 #  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value	*/
 #endif
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH	*/
-#define BOOTFLAG_WARM		0x02	/* Software reboot			*/
-
-
 #endif	/* __CONFIG_H */