X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fwarp.h;h=90ff9417c6b4fcafa8049b4dafb53d401adae2d1;hb=3788b451e32bc925c4a63a882acc9c3b4ee895be;hp=e851da00133c12d4065dc2b96b85887e1f870d7f;hpb=97ee459033f42e41be732a4baba06db7ba6e95e1;p=u-boot diff --git a/include/configs/warp.h b/include/configs/warp.h index e851da0013..90ff9417c6 100644 --- a/include/configs/warp.h +++ b/include/configs/warp.h @@ -13,89 +13,35 @@ #ifndef __CONFIG_H #define __CONFIG_H -#include -#include #include "mx6_common.h" -#define CONFIG_MX6 -#define CONFIG_DISPLAY_CPUINFO -#define CONFIG_DISPLAY_BOARDINFO -#define CONFIG_SYS_GENERIC_BOARD - -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_INITRD_TAG -#define CONFIG_REVISION_TAG - /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) /* Increase due to DFU */ #define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_BOARD_LATE_INIT -#define CONFIG_MXC_GPIO #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR /* MMC Configs */ -#define CONFIG_FSL_ESDHC -#define CONFIG_FSL_USDHC -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR #define CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT - -#define CONFIG_MMC -#define CONFIG_CMD_MMC -#define CONFIG_GENERIC_MMC -#define CONFIG_BOUNCE_BUFFER -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_EXT4 -#define CONFIG_CMD_EXT4_WRITE -#define CONFIG_CMD_FAT -#define CONFIG_DOS_PARTITION - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE -#define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE 115200 - -/* FLASH and environment organization */ -#define CONFIG_SYS_NO_FLASH - -/* Command definition */ -#include -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_NFS - -#define CONFIG_BOOTDELAY 3 - -#define CONFIG_LOADADDR 0x82000000 -#define CONFIG_SYS_TEXT_BASE 0x87800000 - -/* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_AUTO_COMPLETE -#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE +#define CONFIG_SUPPORT_EMMC_BOOT /* Watchdog */ #define CONFIG_HW_WATCHDOG #define CONFIG_IMX_WATCHDOG #define CONFIG_WATCHDOG_TIMEOUT_MSECS 30000 /* 30s */ -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_256M) -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR - -#define CONFIG_CMDLINE_EDITING #define CONFIG_STACKSIZE SZ_128K /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define PHYS_SDRAM_SIZE SZ_512M #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR @@ -114,45 +60,35 @@ /* VDD voltage 1.65 - 1.95 */ #define CONFIG_SYS_SD_VOLTAGE 0x00000080 -#define CONFIG_OF_LIBFDT -#define CONFIG_CMD_BOOTZ - -#ifndef CONFIG_SYS_DCACHE_OFF -#define CONFIG_CMD_CACHE -#endif - /* USB Configs */ -#define CONFIG_CMD_USB #ifdef CONFIG_CMD_USB #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_MX6 -#define CONFIG_USB_STORAGE #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG2 port enabled */ #endif -#define CONFIG_CI_UDC #define CONFIG_USBD_HS -#define CONFIG_USB_GADGET_DUALSPEED - -#define CONFIG_USB_GADGET -#define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE -#define CONFIG_USBDOWNLOAD_GADGET -#define CONFIG_USB_GADGET_VBUS_DRAW 2 - -#define CONFIG_G_DNL_VENDOR_NUM 0x0525 -#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 -#define CONFIG_G_DNL_MANUFACTURER "FSL" - -#define CONFIG_CMD_DFU -#define CONFIG_DFU_FUNCTION -#define CONFIG_DFU_MMC -#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M + +#define CONFIG_USB_FUNCTION_MASS_STORAGE + +#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M #define DFU_DEFAULT_POLL_TIMEOUT 300 +/* I2C Configs */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ +#define CONFIG_SYS_I2C_SPEED 100000 + +/* PMIC */ +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_MAX77696 + #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \