X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fx86-chromebook.h;h=27ba9ee229f30b5698cf577b3698b9a876f92db4;hb=38d2831d3b1bc618c36fcba855368e9ac239f3cc;hp=b6a76fe0755aa86b2fc717dc626ba79403189583;hpb=b939689c7b87773c44275a578ffc8674a867e39d;p=u-boot

diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h
index b6a76fe075..27ba9ee229 100644
--- a/include/configs/x86-chromebook.h
+++ b/include/configs/x86-chromebook.h
@@ -1,5 +1,4 @@
 /*
- *
  * Copyright (c) 2015 Google, Inc
  *
  * SPDX-License-Identifier:	GPL-2.0+
@@ -10,25 +9,11 @@
 
 #define CONFIG_SYS_MONITOR_LEN			(1 << 20)
 
-#define CONFIG_DCACHE_RAM_MRC_VAR_SIZE		0x4000
-#define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_MISC_INIT_R
 
-#define CONFIG_NR_DRAM_BANKS			8
 #define CONFIG_X86_MRC_ADDR			0xfffa0000
-#define CONFIG_CACHE_MRC_SIZE_KB		512
-
-#define CONFIG_X86_SERIAL
-
-#define CONFIG_SCSI_DEV_LIST	\
-	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_NM10_AHCI}, \
-	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
-	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
-	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}, \
-	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_AHCI}
-
-#define CONFIG_X86_OPTION_ROM_FILE		pci8086,0166.bin
-#define CONFIG_X86_OPTION_ROM_ADDR		0xfff90000
+#define CONFIG_X86_REFCODE_ADDR			0xffea0000
+#define CONFIG_X86_REFCODE_RUN_ADDR		0
 
 #define CONFIG_PCI_MEM_BUS	0xe0000000
 #define CONFIG_PCI_MEM_PHYS	CONFIG_PCI_MEM_BUS
@@ -42,27 +27,17 @@
 #define CONFIG_PCI_IO_PHYS	CONFIG_PCI_IO_BUS
 #define CONFIG_PCI_IO_SIZE	0xefff
 
-#define CONFIG_SYS_EARLY_PCI_INIT
-#define CONFIG_PCI_PNP
-
 #define CONFIG_BIOSEMU
 #define VIDEO_IO_OFFSET				0
 #define CONFIG_X86EMU_RAW_IO
 
-#define CONFIG_CROS_EC
-#define CONFIG_CROS_EC_LPC
-#define CONFIG_CMD_CROS_EC
-#define CONFIG_ARCH_EARLY_INIT_R
-
-#undef CONFIG_ENV_IS_NOWHERE
 #undef CONFIG_ENV_SIZE
 #define CONFIG_ENV_SIZE			0x1000
 #define CONFIG_ENV_SECT_SIZE		0x1000
-#define CONFIG_ENV_IS_IN_SPI_FLASH
 #define CONFIG_ENV_OFFSET		0x003f8000
 
-#define CONFIG_STD_DEVICES_SETTINGS     "stdin=usbkbd,vga,serial\0" \
-					"stdout=vga,serial\0" \
-					"stderr=vga,serial\0"
+#define CONFIG_STD_DEVICES_SETTINGS	"stdin=usbkbd,i8042-kbd,serial\0" \
+					"stdout=vidconsole,serial\0" \
+					"stderr=vidconsole,serial\0"
 
 #endif