X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fxpedite517x.h;h=34142302445e1a378381b902118bb65ca34b1a3e;hb=61b57c4ab93a2dc6c7dd4e96e85543d2aafffe9c;hp=2b6e895ec846d3bb3f26bf6a4cfe32fbb3664b73;hpb=c00ac259f60112bb263a73f211ce3bb8f529c2c0;p=u-boot diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h index 2b6e895ec8..3414230244 100644 --- a/include/configs/xpedite517x.h +++ b/include/configs/xpedite517x.h @@ -2,23 +2,7 @@ * Copyright 2009 Extreme Engineering Solutions, Inc. * Copyright 2007-2008 Freescale Semiconductor, Inc. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ /* @@ -30,7 +14,6 @@ /* * High Level Configuration Options */ -#define CONFIG_MPC86xx 1 /* MPC86xx */ #define CONFIG_MPC8641 1 /* MPC8641 specific */ #define CONFIG_XPEDITE5140 1 /* MPC8641HPCN board specific */ #define CONFIG_SYS_BOARD_NAME "XPedite5170" @@ -40,6 +23,8 @@ #define CONFIG_BAT_RW 1 /* Use common BAT rw code */ #define CONFIG_HIGH_BATS 1 /* High BATs supported and enabled */ #define CONFIG_ALTIVEC 1 +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO #define CONFIG_SYS_TEXT_BASE 0xfff00000 @@ -49,13 +34,14 @@ #define CONFIG_PCIE1 1 /* PCIE controler 1 */ #define CONFIG_PCIE2 1 /* PCIE controler 2 */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ +#define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ /* * DDR config */ -#define CONFIG_FSL_DDR2 +#define CONFIG_SYS_FSL_DDR2 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD #define CONFIG_MEM_INIT_VALUE 0xdeadbeef @@ -108,6 +94,21 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_ALT_MEMTEST #define CONFIG_SYS_MEMTEST_START 0x10000000 #define CONFIG_SYS_MEMTEST_END 0x20000000 +#define CONFIG_POST (CONFIG_SYS_POST_MEMORY |\ + CONFIG_SYS_POST_I2C) +#define I2C_ADDR_LIST {CONFIG_SYS_I2C_DS1621_ADDR, \ + CONFIG_SYS_I2C_DS4510_ADDR, \ + CONFIG_SYS_I2C_EEPROM_ADDR, \ + CONFIG_SYS_I2C_LM90_ADDR, \ + CONFIG_SYS_I2C_PCA9553_ADDR, \ + CONFIG_SYS_I2C_PCA953X_ADDR0, \ + CONFIG_SYS_I2C_PCA953X_ADDR1, \ + CONFIG_SYS_I2C_PCA953X_ADDR2, \ + CONFIG_SYS_I2C_PCA953X_ADDR3, \ + CONFIG_SYS_I2C_PEX8518_ADDR, \ + CONFIG_SYS_I2C_RTC_ADDR} +/* The XPedite5170 can host an XMC which has an EEPROM at address 0x50 */ +#define I2C_ADDR_IGNORE_LIST {0x50} /* * Memory map @@ -203,10 +204,9 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); */ #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe0000000 -#define CONFIG_SYS_INIT_RAM_END 0x00004000 +#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 KB for Mon */ @@ -232,7 +232,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); * Use the HUSH parser */ #define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /* * Pass open firmware flat tree @@ -244,13 +243,14 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SYS_I2C_SPEED 100000 /* M41T00 only supports 100 KHz */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 -#define CONFIG_I2C_MULTI_BUS +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 100000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 100000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 /* PEX8518 slave I2C interface */ #define CONFIG_SYS_I2C_PEX8518_ADDR 0x70 @@ -259,6 +259,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_I2C_DS1621_ADDR 0x48 #define CONFIG_DTT_DS1621 #define CONFIG_DTT_SENSORS { 0 } +#define CONFIG_SYS_I2C_LM90_ADDR 0x4c /* I2C EEPROM - AT24C128B */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 @@ -282,6 +283,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_I2C_PCA953X_ADDR2 0x1e #define CONFIG_SYS_I2C_PCA953X_ADDR3 0x1f #define CONFIG_SYS_I2C_PCA953X_ADDR CONFIG_SYS_I2C_PCA953X_ADDR0 +#define CONFIG_SYS_I2C_PCA9553_ADDR 0x62 /* * PU = pulled high, PD = pulled low @@ -345,7 +347,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ -#define CONFIG_NET_MULTI 1 #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_ETHPRIME "eTSEC1" @@ -556,12 +557,10 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */ #define CONFIG_CMDLINE_EDITING 1 /* Command-line editing */ #define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */ #define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */ @@ -601,12 +600,12 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); * f6f00000 - f7efffff Sec OS image (16MB) * f0000000 - f6efffff Sec OS Use/Filesystem (111MB) */ -#define CONFIG_UBOOT1_ENV_ADDR MK_STR(0xfff00000) -#define CONFIG_UBOOT2_ENV_ADDR MK_STR(0xf7f00000) -#define CONFIG_FDT1_ENV_ADDR MK_STR(0xfffc0000) -#define CONFIG_FDT2_ENV_ADDR MK_STR(0xf7fc0000) -#define CONFIG_OS1_ENV_ADDR MK_STR(0xfef00000) -#define CONFIG_OS2_ENV_ADDR MK_STR(0xf6f00000) +#define CONFIG_UBOOT1_ENV_ADDR __stringify(0xfff00000) +#define CONFIG_UBOOT2_ENV_ADDR __stringify(0xf7f00000) +#define CONFIG_FDT1_ENV_ADDR __stringify(0xfffc0000) +#define CONFIG_FDT2_ENV_ADDR __stringify(0xf7fc0000) +#define CONFIG_OS1_ENV_ADDR __stringify(0xfef00000) +#define CONFIG_OS2_ENV_ADDR __stringify(0xf6f00000) #define CONFIG_PROG_UBOOT1 \ "$download_cmd $loadaddr $ubootfile; " \