X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fzipitz2.h;h=1dbbc15256e3563708e23f34739d3926ae779461;hb=30dc880ad11f8a4fe95f25b1890f5e51aa4dee96;hp=ade40b54e8ad1f0faa3483b9a164139c2cbe1919;hpb=b9d77535e9335b554af03aa0e0a54b664677d018;p=u-boot

diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h
index ade40b54e8..1dbbc15256 100644
--- a/include/configs/zipitz2.h
+++ b/include/configs/zipitz2.h
@@ -3,20 +3,7 @@
  *
  * Copyright (C) 2009-2010 Marek Vasut <marek.vasut@gmail.com>
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -25,13 +12,13 @@
 /*
  * High Level Board Configuration Options
  */
-#define	CONFIG_PXA27X		1	/* Marvell PXA270 CPU */
+#define	CONFIG_CPU_PXA27X		1	/* Marvell PXA270 CPU */
 #define	CONFIG_ZIPITZ2		1	/* Zipit Z2 board */
 #define	CONFIG_SYS_TEXT_BASE	0x0
 
-#undef	BOARD_LATE_INIT
-#undef	CONFIG_USE_IRQ
+#undef	CONFIG_BOARD_LATE_INIT
 #undef	CONFIG_SKIP_LOWLEVEL_INIT
+#define	CONFIG_PREBOOT
 
 /*
  * Environment settings
@@ -41,11 +28,15 @@
 #define CONFIG_ENV_ADDR			0x40000
 #define CONFIG_ENV_SIZE			0x20000
 
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_DCACHE_OFF
+
 #define	CONFIG_SYS_MALLOC_LEN		(128*1024)
 #define	CONFIG_ARCH_CPU_INIT
 
 #define	CONFIG_BOOTCOMMAND						\
-	"if mmc init && fatload mmc 0 0xa0000000 uboot.script ; then "	\
+	"if mmc rescan && ext2load mmc 0 0xa0000000 boot/uboot.script ;"\
+	"then "								\
 		"source 0xa0000000; "					\
 	"else "								\
 		"bootm 0x60000; "					\
@@ -65,8 +56,8 @@
  */
 #define	CONFIG_PXA_SERIAL
 #define	CONFIG_STUART			1
+#define CONFIG_CONS_INDEX		2
 #define	CONFIG_BAUDRATE			115200
-#define	CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
 
 /*
  * Bootloader Components Configuration
@@ -85,7 +76,8 @@
  */
 #ifdef	CONFIG_CMD_MMC
 #define	CONFIG_MMC
-#define	CONFIG_PXA_MMC
+#define	CONFIG_GENERIC_MMC
+#define	CONFIG_PXA_MMC_GENERIC
 #define	CONFIG_SYS_MMC_BASE		0xF0000000
 #define	CONFIG_CMD_FAT
 #define CONFIG_CMD_EXT2
@@ -98,6 +90,7 @@
 #ifdef	CONFIG_CMD_SPI
 #define	CONFIG_SOFT_SPI
 #define	CONFIG_LCD
+#define	CONFIG_PXA_LCD
 #define	CONFIG_LMS283GF05
 #define	CONFIG_VIDEO_LOGO
 #define	CONFIG_CMD_BMP
@@ -106,7 +99,6 @@
 #define	CONFIG_VIDEO_BMP_GZIP
 #define	CONFIG_VIDEO_BMP_RLE8
 #define	CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	(2 << 20)
-#undef	SPI_INIT
 
 #define	SPI_DELAY	udelay(10)
 #define	SPI_SDA(val)	zipitz2_spi_sda(val)
@@ -124,20 +116,16 @@ unsigned char zipitz2_spi_read(void);
  */
 #ifdef	CONFIG_CMD_KGDB
 #define	CONFIG_KGDB_BAUDRATE		230400		/* speed to run kgdb serial port */
-#define	CONFIG_KGDB_SER_INDEX		2		/* which serial port to use */
 #endif
 
 /*
  * HUSH Shell Configuration
  */
 #define	CONFIG_SYS_HUSH_PARSER		1
-#define	CONFIG_SYS_PROMPT_HUSH_PS2	"> "
 
 #define	CONFIG_SYS_LONGHELP				/* undef to save memory	*/
 #ifdef	CONFIG_SYS_HUSH_PARSER
 #define	CONFIG_SYS_PROMPT		"$ "		/* Monitor Command Prompt */
-#else
-#define	CONFIG_SYS_PROMPT		"=> "		/* Monitor Command Prompt */
 #endif
 #define	CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size */
 #define	CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size */
@@ -148,18 +136,13 @@ unsigned char zipitz2_spi_read(void);
 /*
  * Clock Configuration
  */
-#undef	CONFIG_SYS_CLKS_IN_HZ
-#define	CONFIG_SYS_HZ			3250000		/* Timer @ 3250000 Hz */
 #define CONFIG_SYS_CPUSPEED		0x190		/* standard setting for 312MHz; L=16, N=1.5, A=0, SDCLK!=SystemBus */
 
 /*
- * Stack sizes
+ * SRAM Map
  */
-#define	CONFIG_STACKSIZE		(128*1024)	/* regular stack */
-#ifdef	CONFIG_USE_IRQ
-#define	CONFIG_STACKSIZE_IRQ		(4*1024)	/* IRQ stack */
-#define	CONFIG_STACKSIZE_FIQ		(4*1024)	/* FIQ stack */
-#endif
+#define	PHYS_SRAM			0x5c000000	/* SRAM Bank #1 */
+#define	PHYS_SRAM_SIZE			0x00040000	/* 256k */
 
 /*
  * DRAM Map
@@ -177,7 +160,7 @@ unsigned char zipitz2_spi_read(void);
 #define	CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_DRAM_BASE
 
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
-#define	CONFIG_SYS_INIT_SP_ADDR		(GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1 + 2048)
+#define	CONFIG_SYS_INIT_SP_ADDR		(GENERATED_GBL_DATA_SIZE + PHYS_SRAM + 2048)
 
 /*
  * NOR FLASH
@@ -199,10 +182,10 @@ unsigned char zipitz2_spi_read(void);
 
 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	1
 
-#define CONFIG_SYS_FLASH_ERASE_TOUT	(2*CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_WRITE_TOUT	(2*CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_LOCK_TOUT	(2*CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_UNLOCK_TOUT	(2*CONFIG_SYS_HZ)
+#define CONFIG_SYS_FLASH_ERASE_TOUT	240000
+#define CONFIG_SYS_FLASH_WRITE_TOUT	240000
+#define CONFIG_SYS_FLASH_LOCK_TOUT	240000
+#define CONFIG_SYS_FLASH_UNLOCK_TOUT	240000
 #define CONFIG_SYS_FLASH_PROTECTION
 
 /*