X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2Fzynq-common.h;h=87b4fffeb9fb262143edaae2599220c04255a959;hb=7a7ffedabd29adde9cb6ebe6066256c4cf8b77af;hp=4c7a7b009ef6e0a529ef582c1e4a1a241ea8562f;hpb=88e34e5ff76bffa7d56b1d04e0bd2627ee5b584d;p=u-boot diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 4c7a7b009e..87b4fffeb9 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -10,9 +10,6 @@ #ifndef __CONFIG_ZYNQ_COMMON_H #define __CONFIG_ZYNQ_COMMON_H -/* High Level configuration Options */ -#define CONFIG_ARMV7 - /* CPU clock */ #ifndef CONFIG_CPU_FREQ_HZ # define CONFIG_CPU_FREQ_HZ 800000000 @@ -227,8 +224,6 @@ #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */ /* FDT support */ -#define CONFIG_OF_CONTROL -#define CONFIG_OF_SEPARATE #define CONFIG_DISPLAY_BOARDINFO_LATE /* RSA support */ @@ -270,28 +265,23 @@ #define CONFIG_SPL_MMC_SUPPORT #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ -#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #define CONFIG_SPL_LIBDISK_SUPPORT #define CONFIG_SPL_FAT_SUPPORT -#if defined(CONFIG_OF_CONTROL) && defined(CONFIG_OF_SEPARATE) -# define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot-dtb.img" -#else -# define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" -#endif +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" #endif /* Disable dcache for SPL just for sure */ #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_DCACHE_OFF #undef CONFIG_FPGA -#undef CONFIG_OF_CONTROL #endif /* Address in RAM where the parameters must be copied by SPL. */ #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000 -#define CONFIG_SPL_FAT_LOAD_ARGS_NAME "system.dtb" -#define CONFIG_SPL_FAT_LOAD_KERNEL_NAME "uImage" +#define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb" +#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" /* Not using MMC raw mode - just for compilation purpose */ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0