X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Flcd.h;h=d95feeb791d713355e997f95fe2c908a1fcfa8a4;hb=be662e9a6b7bf27cb7bc06de18f3c51b2ea80160;hp=cd9d49d3ae4f845a85a169f5ae53958201ca1e94;hpb=9efac4a1eb99d9c5539aa6992025eeacab7980c6;p=u-boot

diff --git a/include/lcd.h b/include/lcd.h
index cd9d49d3ae..d95feeb791 100644
--- a/include/lcd.h
+++ b/include/lcd.h
@@ -87,7 +87,8 @@ typedef struct vidinfo {
 	u_char	vl_wbf;		/* Wait between frames */
 } vidinfo_t;
 
-#elif defined CONFIG_PXA250 || defined CONFIG_PXA27X || defined CONFIG_CPU_MONAHANS
+#elif defined(CONFIG_CPU_PXA25X) || defined(CONFIG_CPU_PXA27X) || \
+	defined CONFIG_CPU_MONAHANS
 /*
  * PXA LCD DMA descriptor
  */
@@ -159,14 +160,15 @@ typedef struct vidinfo {
 #elif defined(CONFIG_ATMEL_LCD)
 
 typedef struct vidinfo {
-	u_long vl_col;		/* Number of columns (i.e. 640) */
-	u_long vl_row;		/* Number of rows (i.e. 480) */
+	ushort vl_col;		/* Number of columns (i.e. 640) */
+	ushort vl_row;		/* Number of rows (i.e. 480) */
 	u_long vl_clk;	/* pixel clock in ps    */
 
 	/* LCD configuration register */
 	u_long vl_sync;		/* Horizontal / vertical sync */
 	u_long vl_bpix;		/* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
 	u_long vl_tft;		/* 0 = passive, 1 = TFT */
+	u_long vl_cont_pol_low;	/* contrast polarity is low */
 
 	/* Horizontal control register. */
 	u_long vl_hsync_len;	/* Length of horizontal sync */
@@ -194,7 +196,7 @@ typedef struct vidinfo {
 	void	*priv;		/* Pointer to driver-specific data */
 } vidinfo_t;
 
-#endif /* CONFIG_MPC823, CONFIG_PXA250 or CONFIG_MCC200 or CONFIG_ATMEL_LCD */
+#endif /* CONFIG_MPC823, CONFIG_CPU_PXA25X, CONFIG_MCC200, CONFIG_ATMEL_LCD */
 
 extern vidinfo_t panel_info;
 
@@ -209,6 +211,8 @@ void	lcd_disable	(void);
 void	lcd_putc	(const char c);
 void	lcd_puts	(const char *s);
 void	lcd_printf	(const char *fmt, ...);
+void	lcd_clear(void);
+int	lcd_display_bitmap(ulong bmp_image, int x, int y);
 
 /* Allow boards to customize the information displayed */
 void lcd_show_board_info(void);