X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fmpc83xx.h;h=c2a4ff587745d69bb9bedd394b58726f38a6c322;hb=d62f64cc23a940eafe712c776b3249e4160753d1;hp=33f02ef07ddd65572c925826ca250dc027ec1143;hpb=b110f40bd180c6b560276589beedf753e97c46ce;p=u-boot

diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index 33f02ef07d..c2a4ff5877 100644
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -509,6 +509,7 @@
 #define SCCR_PCICM_SHIFT		16
 
 /* SCCR bits - MPC8349 specific */
+#ifdef CONFIG_MPC834X
 #define SCCR_TSEC1CM			0xc0000000
 #define SCCR_TSEC1CM_SHIFT		30
 #define SCCR_TSEC1CM_0			0x00000000
@@ -522,6 +523,7 @@
 #define SCCR_TSEC2CM_1			0x10000000
 #define SCCR_TSEC2CM_2			0x20000000
 #define SCCR_TSEC2CM_3			0x30000000
+#endif
 
 #define SCCR_USBMPHCM			0x00c00000
 #define SCCR_USBMPHCM_SHIFT		22
@@ -533,13 +535,6 @@
 #define SCCR_USBCM_2			0x00A00000
 #define SCCR_USBCM_3			0x00F00000
 
-#define SCCR_CLK_MASK			( SCCR_TSEC1CM_3	\
-					| SCCR_TSEC2CM_3	\
-					| SCCR_ENCCM_3		\
-					| SCCR_USBCM_3		)
-
-#define SCCR_DEFAULT			0xFFFFFFFF
-
 /* CSn_BDNS - Chip Select memory Bounds Register
  */
 #define CSBNDS_SA			0x00FF0000