X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fnetdev.h;h=4724717d99a58d94e411a39cbfbdb677717d3dc0;hb=d5f6a15a397839b2e0f1f78e7a4a4ffe9c2ccb26;hp=94eedfe29dedf79688732cf6fb6a296fcc22d016;hpb=9efac4a1eb99d9c5539aa6992025eeacab7980c6;p=u-boot diff --git a/include/netdev.h b/include/netdev.h index 94eedfe29d..4724717d99 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -42,27 +42,35 @@ int cpu_eth_init(bd_t *bis); /* Driver initialization prototypes */ int altera_tse_initialize(u8 dev_num, int mac_base, - int sgdma_rx_base, int sgdma_tx_base); -int ax88180_initialize(bd_t *bis); -int au1x00_enet_initialize(bd_t*); + int sgdma_rx_base, int sgdma_tx_base, + u32 sgdma_desc_base, u32 sgdma_desc_size); int at91emac_register(bd_t *bis, unsigned long iobase); +int au1x00_enet_initialize(bd_t*); +int ax88180_initialize(bd_t *bis); int bfin_EMAC_initialize(bd_t *bis); +int calxedaxgmac_initialize(u32 id, ulong base_addr); int cs8900_initialize(u8 dev_num, int base_addr); -int dc21x4x_initialize(bd_t *bis); int davinci_emac_initialize(void); +int dc21x4x_initialize(bd_t *bis); int designware_initialize(u32 id, ulong base_addr, u32 phy_addr); +int dm9000_initialize(bd_t *bis); int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr); int e1000_initialize(bd_t *bis); int eepro100_initialize(bd_t *bis); +int enc28j60_initialize(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode); int ep93xx_eth_initialize(u8 dev_num, int base_addr); -int ethoc_initialize(u8 dev_num, int base_addr); int eth_3com_initialize (bd_t * bis); +int ethoc_initialize(u8 dev_num, int base_addr); int fec_initialize (bd_t *bis); -int fecmxc_initialize (bd_t *bis); +int fecmxc_initialize(bd_t *bis); +int fecmxc_initialize_multi(bd_t *bis, int dev_id, int phy_id, uint32_t addr); +int ftgmac100_initialize(bd_t *bits); int ftmac100_initialize(bd_t *bits); int greth_initialize(bd_t *bis); void gt6426x_eth_initialize(bd_t *bis); int inca_switch_initialize(bd_t *bis); +int ks8695_eth_initialize(void); int lan91c96_initialize(u8 dev_num, int base_addr); int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); int mcdmafec_initialize(bd_t *bis); @@ -73,6 +81,7 @@ int mpc8220_fec_initialize(bd_t *bis); int mpc82xx_scc_enet_initialize(bd_t *bis); int mvgbe_initialize(bd_t *bis); int natsemi_initialize(bd_t *bis); +int ne2k_register(void); int npe_initialize(bd_t *bis); int ns8382x_initialize(bd_t *bis); int pcnet_initialize(bd_t *bis); @@ -81,15 +90,30 @@ int ppc_4xx_eth_initialize (bd_t *bis); int rtl8139_initialize(bd_t *bis); int rtl8169_initialize(bd_t *bis); int scc_initialize(bd_t *bis); +int sh_eth_initialize(bd_t *bis); int skge_initialize(bd_t *bis); -int smc911x_initialize(u8 dev_num, int base_addr); int smc91111_initialize(u8 dev_num, int base_addr); +int smc911x_initialize(u8 dev_num, int base_addr); int tsi108_eth_initialize(bd_t *bis); -int uec_initialize(int index); int uec_standard_init(bd_t *bis); int uli526x_initialize(bd_t *bis); -int sh_eth_initialize(bd_t *bis); -int dm9000_initialize(bd_t *bis); +int armada100_fec_register(unsigned long base_addr); +int xilinx_axiemac_initialize(bd_t *bis, unsigned long base_addr, + unsigned long dma_addr); +int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr, + int txpp, int rxpp); +int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags, + unsigned long ctrl_addr); + +/* + * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface + * exported by a public hader file, we need a global definition at this point. + */ +#if defined(CONFIG_XILINX_LL_TEMAC) +#define XILINX_LL_TEMAC_M_FIFO 0 /* use FIFO Ctrl */ +#define XILINX_LL_TEMAC_M_SDMA_PLB (1 << 0)/* use SDMA Ctrl via PLB */ +#define XILINX_LL_TEMAC_M_SDMA_DCR (1 << 1)/* use SDMA Ctrl via DCR */ +#endif /* Boards with PCI network controllers can call this from their board_eth_init() * function to initialize whatever's on board. @@ -180,4 +204,9 @@ struct mv88e61xx_config { int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig); #endif /* CONFIG_MV88E61XX_SWITCH */ +/* + * Allow FEC to fine-tune MII configuration on boards which require this. + */ +int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int)); + #endif /* _NETDEV_H_ */