X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fnios-io.h;h=dc7e127fe54d184b5864e9a67c25e92cbf286012;hb=5720df78ad48cb98cff7cfb816565fb8a5d0d1b6;hp=052c6b0b56b0da6f24041c3969edf6bfc4636f70;hpb=42d1f0394bef0624fc9664714d54bb137931d6a6;p=u-boot diff --git a/include/nios-io.h b/include/nios-io.h index 052c6b0b56..dc7e127fe5 100644 --- a/include/nios-io.h +++ b/include/nios-io.h @@ -29,7 +29,7 @@ #define __NIOSIO_H__ /*------------------------------------------------------------------------ - * UART + * UART (http://www.altera.com/literature/ds/ds_nios_uart.pdf) *----------------------------------------------------------------------*/ typedef volatile struct nios_uart_t { unsigned rxdata; /* Rx data reg */ @@ -71,7 +71,7 @@ typedef volatile struct nios_uart_t { /*------------------------------------------------------------------------ - * TIMER + * TIMER (http://www.altera.com/literature/ds/ds_nios_timer.pdf) *----------------------------------------------------------------------*/ typedef volatile struct nios_timer_t { unsigned status; /* Timer status reg */ @@ -92,4 +92,92 @@ typedef volatile struct nios_timer_t { #define NIOS_TIMER_START (1 << 2) /* Start timer */ #define NIOS_TIMER_STOP (1 << 3) /* Stop timer */ + +/*------------------------------------------------------------------------ + * PIO (http://www.altera.com/literature/ds/ds_nios_pio.pdf) + *----------------------------------------------------------------------*/ +typedef volatile struct nios_pio_t { + unsigned int data; /* Data value at each PIO in/out */ + unsigned int direction; /* Data direct. for each PIO bit */ + unsigned int interruptmask; /* Per-bit IRQ enable/disable */ + unsigned int edgecapture; /* Per-bit sync. edge detect & hold */ +}nios_pio_t; + +/* direction register */ +#define NIOS_PIO_OUT (1) /* PIO bit is output */ +#define NIOS_PIO_IN (0) /* PIO bit is input */ + + +/*------------------------------------------------------------------------ + * SPI (http://www.altera.com/literature/ds/ds_nios_spi.pdf) + *----------------------------------------------------------------------*/ +typedef volatile struct nios_spi_t { + unsigned rxdata; /* Rx data reg */ + unsigned txdata; /* Tx data reg */ + unsigned status; /* Status reg */ + unsigned control; /* Control reg */ + unsigned reserved; /* (master only) */ + unsigned slaveselect; /* SPI slave select mask (master only) */ +}nios_spi_t; + +/* status register */ +#define NIOS_SPI_ROE (1 << 3) /* rx overrun */ +#define NIOS_SPI_TOE (1 << 4) /* tx overrun */ +#define NIOS_SPI_TMT (1 << 5) /* tx empty */ +#define NIOS_SPI_TRDY (1 << 6) /* tx ready */ +#define NIOS_SPI_RRDY (1 << 7) /* rx ready */ +#define NIOS_SPI_E (1 << 8) /* exception */ + +/* control register */ +#define NIOS_SPI_IROE (1 << 3) /* rx overrun int ena */ +#define NIOS_SPI_ITOE (1 << 4) /* tx overrun int ena */ +#define NIOS_SPI_ITRDY (1 << 6) /* tx ready int ena */ +#define NIOS_SPI_IRRDY (1 << 7) /* rx ready int ena */ +#define NIOS_SPI_IE (1 << 8) /* exception int ena */ +#define NIOS_SPI_SSO (1 << 10) /* override SS_n output */ + +/*------------------------------------------------------------------------ + * ASMI + *----------------------------------------------------------------------*/ +typedef volatile struct nios_asmi_t { + unsigned rxdata; /* Rx data reg */ + unsigned txdata; /* Tx data reg */ + unsigned status; /* Status reg */ + unsigned control; /* Control reg */ + unsigned reserved; + unsigned slavesel; /* Slave select */ + unsigned endofpacket; /* End-of-packet reg */ +}nios_asmi_t; + +/* status register */ +#define NIOS_ASMI_ROE (1 << 3) /* rx overrun */ +#define NIOS_ASMI_TOE (1 << 4) /* tx overrun */ +#define NIOS_ASMI_TMT (1 << 5) /* tx empty */ +#define NIOS_ASMI_TRDY (1 << 6) /* tx ready */ +#define NIOS_ASMI_RRDY (1 << 7) /* rx ready */ +#define NIOS_ASMI_E (1 << 8) /* exception */ +#define NIOS_ASMI_EOP (1 << 9) /* eop detected */ + +/* control register */ +#define NIOS_ASMI_IROE (1 << 3) /* rx overrun int ena */ +#define NIOS_ASMI_ITOE (1 << 4) /* tx overrun int ena */ +#define NIOS_ASMI_ITRDY (1 << 6) /* tx ready int ena */ +#define NIOS_ASMI_IRRDY (1 << 7) /* rx ready int ena */ +#define NIOS_ASMI_IE (1 << 8) /* exception int ena */ +#define NIOS_ASMI_IEOP (1 << 9) /* rx eop int ena */ +#define NIOS_ASMI_SSO (1 << 10) /* slave select enable */ + +/*------------------------------------------------------------------------ + * JTAG UART + *----------------------------------------------------------------------*/ +typedef volatile struct nios_jtag_t { + unsigned short rxcntl; /* Rx data/cntl reg */ + unsigned short txcntl; /* Tx data/cntl reg */ + unsigned short errcntl; /* Err dta/cntl reg */ +}nios_jtag_t; + +/* status register */ +#define NIOS_JTAG_TRDY (1 << 8) /* tx ready bit */ +#define NIOS_JTAG_RRDY (1 << 8) /* rx ready bit */ + #endif /* __NIOSIO_H__ */