X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fpci.h;h=491f814e413fa451f81ae3b0fa04a42dd7f83c98;hb=c85b58397030e25e146ccf5085c86221c40c53b3;hp=072273be572b1e7f14773cb865087736044ba4ce;hpb=fd6646c0b9ebe7e5afc4ae4c78097d9cd317a5e8;p=u-boot

diff --git a/include/pci.h b/include/pci.h
index 072273be57..491f814e41 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -222,6 +222,7 @@
 #define  PCI_CAP_ID_SLOTID	0x04	/* Slot Identification */
 #define  PCI_CAP_ID_MSI		0x05	/* Message Signalled Interrupts */
 #define  PCI_CAP_ID_CHSWP	0x06	/* CompactPCI HotSwap */
+#define  PCI_CAP_ID_EXP 	0x10	/* PCI Express */
 #define PCI_CAP_LIST_NEXT	1	/* Next capability in the list */
 #define PCI_CAP_FLAGS		2	/* Capability defined flags (16 bits) */
 #define PCI_CAP_SIZEOF		4
@@ -334,7 +335,7 @@ struct pci_region {
 #define PCI_REGION_TYPE		0x00000001
 #define PCI_REGION_PREFETCH	0x00000008	/* prefetchable PCI memory */
 
-#define PCI_REGION_MEMORY	0x00000100	/* System memory */
+#define PCI_REGION_SYS_MEMORY	0x00000100	/* System memory */
 #define PCI_REGION_RO		0x00000200	/* Read-only memory */
 
 extern __inline__ void pci_set_region(struct pci_region *reg,
@@ -454,10 +455,29 @@ extern pci_addr_t pci_hose_phys_to_bus(struct pci_controller* hose,
 #define pci_bus_to_phys(dev, addr, flags) \
 	pci_hose_bus_to_phys(pci_bus_to_hose(PCI_BUS(dev)), (addr), (flags))
 
-#define pci_phys_to_mem(dev, addr)	pci_phys_to_bus((dev), (addr), PCI_REGION_MEM)
-#define pci_mem_to_phys(dev, addr)	pci_bus_to_phys((dev), (addr), PCI_REGION_MEM)
-#define pci_phys_to_io(dev, addr)	pci_phys_to_bus((dev), (addr), PCI_REGION_IO)
-#define pci_io_to_phys(dev, addr)	pci_bus_to_phys((dev), (addr), PCI_REGION_IO)
+#define pci_virt_to_bus(dev, addr, flags) \
+	pci_hose_phys_to_bus(pci_bus_to_hose(PCI_BUS(dev)), \
+			     (virt_to_phys(addr)), (flags))
+#define pci_bus_to_virt(dev, addr, flags, len, map_flags) \
+	map_physmem(pci_hose_bus_to_phys(pci_bus_to_hose(PCI_BUS(dev)), \
+					 (addr), (flags)), \
+		    (len), (map_flags))
+
+#define pci_phys_to_mem(dev, addr) \
+	pci_phys_to_bus((dev), (addr), PCI_REGION_MEM)
+#define pci_mem_to_phys(dev, addr) \
+	pci_bus_to_phys((dev), (addr), PCI_REGION_MEM)
+#define pci_phys_to_io(dev, addr)  pci_phys_to_bus((dev), (addr), PCI_REGION_IO)
+#define pci_io_to_phys(dev, addr)  pci_bus_to_phys((dev), (addr), PCI_REGION_IO)
+
+#define pci_virt_to_mem(dev, addr) \
+	pci_virt_to_bus((dev), (addr), PCI_REGION_MEM)
+#define pci_mem_to_virt(dev, addr, len, map_flags) \
+	pci_bus_to_virt((dev), (addr), PCI_REGION_MEM, (len), (map_flags))
+#define pci_virt_to_io(dev, addr) \
+	pci_virt_to_bus((dev), (addr), PCI_REGION_IO)
+#define pci_io_to_virt(dev, addr, len, map_flags) \
+	pci_bus_to_virt((dev), (addr), PCI_REGION_IO, (len), (map_flags))
 
 extern int pci_hose_read_config_byte(struct pci_controller *hose,
 				     pci_dev_t dev, int where, u8 *val);
@@ -488,6 +508,7 @@ extern int pci_hose_write_config_byte_via_dword(struct pci_controller *hose,
 extern int pci_hose_write_config_word_via_dword(struct pci_controller *hose,
 						pci_dev_t dev, int where, u16 val);
 
+extern void *pci_map_bar(pci_dev_t pdev, int bar, int flags);
 extern void pci_register_hose(struct pci_controller* hose);
 extern struct pci_controller* pci_bus_to_hose(int bus);
 
@@ -515,6 +536,8 @@ extern int pci_hose_config_device(struct pci_controller *hose,
 				  pci_addr_t mem,
 				  unsigned long command);
 
+int pci_last_busno(void);
+
 #ifdef CONFIG_MPC824X
 extern void pci_mpc824x_init (struct pci_controller *hose);
 #endif