X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fpost.h;h=fe96312cb08b13d076963fb14c963a18a50accd7;hb=488feef85229c08cd3aa1fa183bc8f483d2ae832;hp=a91baa277a44abddc64160a1503072a21bed6449;hpb=228f29ac6e0026e596b3a6fbb640118b9944cdd8;p=u-boot

diff --git a/include/post.h b/include/post.h
index a91baa277a..fe96312cb0 100644
--- a/include/post.h
+++ b/include/post.h
@@ -30,22 +30,29 @@
 #ifdef CONFIG_POST
 
 #define POST_POWERON		0x01	/* test runs on power-on booting */
-#define POST_POWERNORMAL	0x02	/* test runs on normal booting */
-#define POST_POWERFAIL		0x04	/* test runs on power-fail booting */
+#define POST_NORMAL		0x02	/* test runs on normal booting */
+#define POST_SLOWTEST		0x04	/* test is slow, enabled by key press */
 #define POST_POWERTEST		0x08	/* test runs after watchdog reset */
 
+#define POST_COLDBOOT		0x80	/* first boot after power-on */
+
 #define POST_ROM		0x0100	/* test runs in ROM */
 #define POST_RAM		0x0200	/* test runs in RAM */
 #define POST_MANUAL		0x0400	/* test runs on diag command */
 #define POST_REBOOT		0x0800	/* test may cause rebooting */
 #define POST_PREREL             0x1000  /* test runs before relocation */
 
+#define POST_CRITICAL		0x2000	/* Use failbootcmd if test failed */
+#define POST_STOP		0x4000	/* Interrupt POST sequence on fail */
+
 #define POST_MEM		(POST_RAM | POST_ROM)
-#define POST_ALWAYS		(POST_POWERNORMAL | \
-				 POST_POWERFAIL	  | \
-				 POST_MANUAL	  | \
+#define POST_ALWAYS		(POST_NORMAL	| \
+				 POST_SLOWTEST	| \
+				 POST_MANUAL	| \
 				 POST_POWERON	)
 
+#define POST_FAIL_SAVE		0x80
+
 #ifndef	__ASSEMBLY__
 
 struct post_test {
@@ -54,8 +61,11 @@ struct post_test {
 	char *desc;
 	int flags;
 	int (*test) (int flags);
+	int (*init_f) (void);
+	void (*reloc) (void);
 	unsigned long testid;
 };
+int post_init_f (void);
 void post_bootmode_init (void);
 int post_bootmode_get (unsigned int * last_test);
 void post_bootmode_clear (void);
@@ -64,23 +74,49 @@ int post_run (char *name, int flags);
 int post_info (char *name);
 int post_log (char *format, ...);
 void post_reloc (void);
+unsigned long post_time_ms (unsigned long base);
 
 extern struct post_test post_list[];
 extern unsigned int post_list_size;
+extern int post_hotkeys_pressed(void);
 
+/*
+ *  If GCC is configured to use a version of GAS that supports
+ * the .gnu_attribute directive, it will use that directive to
+ * record certain properties of the output code.
+ *  This feature is new to GCC 4.3.0.
+ *  .gnu_attribute is new to GAS 2.18.
+ */
+#if (__GNUC__ >= 4 && __GNUC_MINOR__ >= 3)
+/* Tag_GNU_Power_ABI_FP/soft-float */
+#define GNU_FPOST_ATTR	asm(".gnu_attribute	4, 2");
+#else
+#define GNU_FPOST_ATTR
+#endif /* __GNUC__ */
 #endif /* __ASSEMBLY__ */
 
-#define CFG_POST_RTC		0x00000001
-#define CFG_POST_WATCHDOG	0x00000002
-#define CFG_POST_MEMORY		0x00000004
-#define CFG_POST_CPU		0x00000008
-#define CFG_POST_I2C		0x00000010
-#define CFG_POST_CACHE		0x00000020
-#define CFG_POST_UART		0x00000040
-#define CFG_POST_ETHER		0x00000080
-#define CFG_POST_SPI		0x00000100
-#define CFG_POST_USB		0x00000200
-#define CFG_POST_SPR		0x00000400
+#define CONFIG_SYS_POST_RTC		0x00000001
+#define CONFIG_SYS_POST_WATCHDOG	0x00000002
+#define CONFIG_SYS_POST_MEMORY		0x00000004
+#define CONFIG_SYS_POST_CPU		0x00000008
+#define CONFIG_SYS_POST_I2C		0x00000010
+#define CONFIG_SYS_POST_CACHE		0x00000020
+#define CONFIG_SYS_POST_UART		0x00000040
+#define CONFIG_SYS_POST_ETHER		0x00000080
+#define CONFIG_SYS_POST_SPI		0x00000100
+#define CONFIG_SYS_POST_USB		0x00000200
+#define CONFIG_SYS_POST_SPR		0x00000400
+#define CONFIG_SYS_POST_SYSMON		0x00000800
+#define CONFIG_SYS_POST_DSP		0x00001000
+#define CONFIG_SYS_POST_OCM		0x00002000
+#define CONFIG_SYS_POST_FPU		0x00004000
+#define CONFIG_SYS_POST_ECC		0x00008000
+#define CONFIG_SYS_POST_BSPEC1		0x00010000
+#define CONFIG_SYS_POST_BSPEC2		0x00020000
+#define CONFIG_SYS_POST_BSPEC3		0x00040000
+#define CONFIG_SYS_POST_BSPEC4		0x00080000
+#define CONFIG_SYS_POST_BSPEC5		0x00100000
+#define CONFIG_SYS_POST_CODEC		0x00200000
 
 #endif /* CONFIG_POST */