X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fppc440.h;h=38809f34b4b351dcaf84a9b7f4a596aaecdd349d;hb=7201cfc4a79c0f55f5ebee73c5a626a49cb53f73;hp=76330f16ac6d8273d7cb24b9830e3ca210dcc034;hpb=98c440bee623ecdd5322852732b883e696fb2140;p=u-boot

diff --git a/include/ppc440.h b/include/ppc440.h
index 76330f16ac..38809f34b4 100644
--- a/include/ppc440.h
+++ b/include/ppc440.h
@@ -282,7 +282,6 @@
 #define sdr_sdstp3	0x4003
 #endif	/* CONFIG_440GX */
 
-#ifdef CONFIG_440
 /*----------------------------------------------------------------------------+
 | Core Configuration/MMU configuration for 440 (CCR1 for 440x5 only).
 +----------------------------------------------------------------------------*/
@@ -306,7 +305,6 @@
 #define MMUCR_IULXE		0x00400000
 #define MMUCR_STS		0x00100000
 #define MMUCR_STID_MASK		0x000000FF
-#endif /* CONFIG_440 */
 
 #ifdef CONFIG_440SPE
 #undef sdr_sdstp2
@@ -1025,7 +1023,7 @@
 #endif /* defined(CONFIG_440EP) || defined(CONFIG_440GR) */
 
 #if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
-#define SDR_USB2D0CR                 0x0320
+#define SDR0_USB2D0CR                 0x0320
 #define   SDR0_USB2D0CR_USB2DEV_EBC_SEL_MASK   0x00000004    /* USB 2.0 Device/EBC Master Selection */
 #define   SDR0_USB2D0CR_USB2DEV_SELECTION      0x00000004    /* USB 2.0 Device Selection */
 #define   SDR0_USB2D0CR_EBC_SELECTION          0x00000000    /* EBC Selection */
@@ -1423,7 +1421,7 @@
 #define uicvr  uic0vr
 #define uicvcr uic0vcr
 
-#if defined(CONFIG_440SPE)
+#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX)
 /*----------------------------------------------------------------------------+
 | Clock / Power-on-reset DCR's.
 +----------------------------------------------------------------------------*/
@@ -1492,9 +1490,11 @@
 #define CPR0_OPBD_OPBDV0_DECODE(n)	((((((unsigned long)(n))>>24)-1)&0x03)+1)
 
 #define CPR0_PERD			0xE0
+#if !defined(CONFIG_440EPX)
 #define CPR0_PERD_PERDV0_MASK		0x03000000
 #define CPR0_PERD_PERDV0_ENCODE(n)	((((unsigned long)(n))&0x03)<<24)
 #define CPR0_PERD_PERDV0_DECODE(n)	((((((unsigned long)(n))>>24)-1)&0x03)+1)
+#endif
 
 #define CPR0_MALD			0x100
 #define CPR0_MALD_MALDV0_MASK		0x03000000
@@ -3354,6 +3354,19 @@ typedef struct {
 	unsigned long pciClkSync;             /* PCI clock is synchronous        */
 } PPC440_SYS_INFO;
 
+static inline u32 get_mcsr(void)
+{
+	u32 val;
+
+	asm volatile("mfspr %0, 0x23c" : "=r" (val) :);
+	return val;
+}
+
+static inline void set_mcsr(u32 val)
+{
+	asm volatile("mtspr 0x23c, %0" : "=r" (val) :);
+}
+
 #endif	/* _ASMLANGUAGE */
 
 #define RESET_VECTOR		0xfffffffc