X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fppc440.h;h=5f87d2c600e04bc649b5e1d29c20dad597f8b407;hb=c9d944d35e7904229c5333e761bce9d4324971f8;hp=a050ffd1c0c99468f8d5f3b81e50e9afe9ef00e4;hpb=77b2517519904194a3eb247a3bb32cb09fac70d7;p=u-boot

diff --git a/include/ppc440.h b/include/ppc440.h
index a050ffd1c0..5f87d2c600 100644
--- a/include/ppc440.h
+++ b/include/ppc440.h
@@ -68,6 +68,12 @@
 #define CPR0_SPCID	0x0120
 #define CPR0_ICFG	0x0140
 
+/* 440EPX boot strap options */
+#define BOOT_STRAP_OPTION_A	0x00000000
+#define BOOT_STRAP_OPTION_B	0x00000001
+#define BOOT_STRAP_OPTION_D	0x00000003
+#define BOOT_STRAP_OPTION_E	0x00000004
+
 /* 440gx sdr register definations */
 #define SDR0_SDSTP0	0x0020	    /* */
 #define SDR0_SDSTP1	0x0021	    /* */
@@ -1713,25 +1719,6 @@
 #define CPR0_PERD_PERDV0_MASK	0x07000000
 #endif
 
-/*-----------------------------------------------------------------------------
-| IIC Register Offsets
-'----------------------------------------------------------------------------*/
-#define IICMDBUF		0x00
-#define IICSDBUF		0x02
-#define IICLMADR		0x04
-#define IICHMADR		0x05
-#define IICCNTL			0x06
-#define IICMDCNTL		0x07
-#define IICSTS			0x08
-#define IICEXTSTS		0x09
-#define IICLSADR		0x0A
-#define IICHSADR		0x0B
-#define IIC0_CLKDIV		0x0C
-#define IICINTRMSK		0x0D
-#define IICXFRCNT		0x0E
-#define IICXTCNTLSS		0x0F
-#define IICDIRECTCNTL		0x10
-
 /*-----------------------------------------------------------------------------
 | PCI Internal Registers et. al. (accessed via plb)
 +----------------------------------------------------------------------------*/