X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fspartan3.h;h=89f115694d1a8eb0096f06f9e52bcbe7f9069d69;hb=3ae6abb697b85516975443ca7eac44d18ed4c53f;hp=b14db039c45362d5d82e6a9856f4bdd49b9bdff9;hpb=875c78934ee252744be1e5b2a9ad7ec5df239239;p=u-boot

diff --git a/include/spartan3.h b/include/spartan3.h
index b14db039c4..89f115694d 100644
--- a/include/spartan3.h
+++ b/include/spartan3.h
@@ -27,10 +27,9 @@
 
 #include <xilinx.h>
 
-extern int Spartan3_load( Xilinx_desc *desc, void *image, size_t size );
-extern int Spartan3_dump( Xilinx_desc *desc, void *buf, size_t bsize );
-extern int Spartan3_info( Xilinx_desc *desc );
-extern int Spartan3_reloc( Xilinx_desc *desc, ulong reloc_off );
+extern int Spartan3_load(Xilinx_desc *desc, const void *image, size_t size);
+extern int Spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
+extern int Spartan3_info(Xilinx_desc *desc);
 
 /* Slave Parallel Implementation function table */
 typedef struct {
@@ -47,7 +46,6 @@ typedef struct {
 	Xilinx_busy_fn	busy;
 	Xilinx_abort_fn	abort;
 	Xilinx_post_fn	post;
-	int           	relocated;
 } Xilinx_Spartan3_Slave_Parallel_fns;
 
 /* Slave Serial Implementation function table */
@@ -58,24 +56,39 @@ typedef struct {
 	Xilinx_init_fn	init;
 	Xilinx_done_fn	done;
 	Xilinx_wr_fn	wr;
-	int           	relocated;
+	Xilinx_post_fn	post;
+	Xilinx_bwr_fn	bwr; /* block write function */
+	Xilinx_abort_fn abort;
 } Xilinx_Spartan3_Slave_Serial_fns;
 
 /* Device Image Sizes
  *********************************************************************/
 /* Spartan-III (1.2V) */
-#define XILINX_XC3S50_SIZE  	439264/8
-#define XILINX_XC3S200_SIZE  	1047616/8
-#define XILINX_XC3S400_SIZE  	1699136/8
-#define XILINX_XC3S1000_SIZE 	3223488/8
-#define XILINX_XC3S1500_SIZE 	5214784/8
-#define XILINX_XC3S2000_SIZE 	7673024/8
-#define XILINX_XC3S4000_SIZE 	11316864/8
-#define XILINX_XC3S5000_SIZE 	13271936/8
+#define XILINX_XC3S50_SIZE	439264/8
+#define XILINX_XC3S200_SIZE	1047616/8
+#define XILINX_XC3S400_SIZE	1699136/8
+#define XILINX_XC3S1000_SIZE	3223488/8
+#define XILINX_XC3S1500_SIZE	5214784/8
+#define XILINX_XC3S2000_SIZE	7673024/8
+#define XILINX_XC3S4000_SIZE	11316864/8
+#define XILINX_XC3S5000_SIZE	13271936/8
+
+/* Spartan-3E (v3.4) */
+#define	XILINX_XC3S100E_SIZE	581344/8
+#define	XILINX_XC3S250E_SIZE	1353728/8
+#define	XILINX_XC3S500E_SIZE	2270208/8
+#define	XILINX_XC3S1200E_SIZE	3841184/8
+#define	XILINX_XC3S1600E_SIZE	5969696/8
+
+/*
+ * Spartan-6 : the Spartan-6 family can be programmed
+ * exactly as the Spartan-3
+ */
+#define XILINK_XC6SLX4_SIZE	(3713568/8)
 
 /* Descriptor Macros
  *********************************************************************/
-/* Spartan-II devices */
+/* Spartan-III devices */
 #define XILINX_XC3S50_DESC(iface, fn_table, cookie) \
 { Xilinx_Spartan3, iface, XILINX_XC3S50_SIZE, fn_table, cookie }
 
@@ -92,12 +105,31 @@ typedef struct {
 { Xilinx_Spartan3, iface, XILINX_XC3S1500_SIZE, fn_table, cookie }
 
 #define XILINX_XC3S2000_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan3, iface, XILINX_XC3S2000E_SIZE, fn_table, cookie }
+{ Xilinx_Spartan3, iface, XILINX_XC3S2000_SIZE, fn_table, cookie }
 
 #define XILINX_XC3S4000_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan3, iface, XILINX_XC3S4000E_SIZE, fn_table, cookie }
+{ Xilinx_Spartan3, iface, XILINX_XC3S4000_SIZE, fn_table, cookie }
 
 #define XILINX_XC3S5000_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan3, iface, XILINX_XC3S5000E_SIZE, fn_table, cookie }
+{ Xilinx_Spartan3, iface, XILINX_XC3S5000_SIZE, fn_table, cookie }
+
+/* Spartan-3E devices */
+#define XILINX_XC3S100E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S100E_SIZE, fn_table, cookie }
+
+#define XILINX_XC3S250E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S250E_SIZE, fn_table, cookie }
+
+#define XILINX_XC3S500E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S500E_SIZE, fn_table, cookie }
+
+#define XILINX_XC3S1200E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie }
+
+#define XILINX_XC3S1600E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie }
+
+#define XILINX_XC6SLX4_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINK_XC6SLX4_SIZE, fn_table, cookie }
 
 #endif /* _SPARTAN3_H_ */