X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fspi_flash.h;h=2db53c74c88efa794eeacab10220d49d56bd0a31;hb=327def5060d03648801b8c92b3235b0c9426af47;hp=692e143b6022d3efb4c98bbaf37c77628f0efdd3;hpb=4e09cc1e2c5d22735d0fa3d2d1eaecd27e19948e;p=u-boot diff --git a/include/spi_flash.h b/include/spi_flash.h index 692e143b60..2db53c74c8 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -19,19 +19,60 @@ #include #include -/* Enum list - Extended read commands */ +/* sf param flags */ +#define SECT_4K 1 << 1 +#define SECT_32K 1 << 2 +#define E_FSR 1 << 3 +#define WR_QPP 1 << 4 + +/* Enum list - Full read commands */ enum spi_read_cmds { ARRAY_SLOW = 1 << 0, DUAL_OUTPUT_FAST = 1 << 1, DUAL_IO_FAST = 1 << 2, + QUAD_OUTPUT_FAST = 1 << 3, + QUAD_IO_FAST = 1 << 4, }; #define RD_EXTN ARRAY_SLOW | DUAL_OUTPUT_FAST | DUAL_IO_FAST +#define RD_FULL RD_EXTN | QUAD_OUTPUT_FAST | QUAD_IO_FAST + +/* Dual SPI flash memories */ +enum spi_dual_flash { + SF_SINGLE_FLASH = 0, + SF_DUAL_STACKED_FLASH = 1 << 0, + SF_DUAL_PARALLEL_FLASH = 1 << 1, +}; + +/** + * struct spi_flash_params - SPI/QSPI flash device params structure + * + * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) + * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id]) + * @ext_jedec: Device ext_jedec ID + * @sector_size: Sector size of this device + * @nr_sectors: No.of sectors on this device + * @e_rd_cmd: Enum list for read commands + * @flags: Important param, for flash specific behaviour + */ +struct spi_flash_params { + const char *name; + u32 jedec; + u16 ext_jedec; + u32 sector_size; + u32 nr_sectors; + u8 e_rd_cmd; + u16 flags; +}; + +extern const struct spi_flash_params spi_flash_params_table[]; /** * struct spi_flash - SPI flash structure * * @spi: SPI slave * @name: Name of SPI flash + * @dual_flash: Indicates dual flash memories - dual stacked, parallel + * @shift: Flash shift useful in dual parallel * @size: Total flash size * @page_size: Write (page) size * @sector_size: Sector size @@ -41,19 +82,23 @@ enum spi_read_cmds { * @bank_curr: Current flash bank * @poll_cmd: Poll cmd - for flash erase/program * @erase_cmd: Erase cmd 4K, 32K, 64K - * @read_cmd: Read cmd - Array Fast and Extn read + * @read_cmd: Read cmd - Array Fast, Extn read and quad read. + * @write_cmd: Write cmd - page and quad program. + * @dummy_byte: Dummy cycles for read operation. * @memory_map: Address of read-only SPI flash access * @read: Flash read ops: Read len bytes at offset into buf * Supported cmds: Fast Array Read - * @write: Flash write ops: Write len bytes from buf into offeset + * @write: Flash write ops: Write len bytes from buf into offset * Supported cmds: Page Program * @erase: Flash erase ops: Erase len bytes from offset * Supported cmds: Sector erase 4K, 32K, 64K - * return 0 - Sucess, 1 - Failure + * return 0 - Success, 1 - Failure */ struct spi_flash { struct spi_slave *spi; const char *name; + u8 dual_flash; + u8 shift; u32 size; u32 page_size; @@ -67,6 +112,8 @@ struct spi_flash { u8 poll_cmd; u8 erase_cmd; u8 read_cmd; + u8 write_cmd; + u8 dummy_byte; void *memory_map; int (*read)(struct spi_flash *flash, u32 offset, size_t len, void *buf); @@ -111,5 +158,6 @@ static inline int spi_flash_erase(struct spi_flash *flash, u32 offset, } void spi_boot(void) __noreturn; +void spi_spl_load_image(uint32_t offs, unsigned int size, void *vdst); #endif /* _SPI_FLASH_H_ */