X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Ftpm-v2.h;h=780e0619750cef4c6c8ea6c2144b2de9196b1e3b;hb=HEAD;hp=a9c604dd52400f81a8ed42174440954816417ba5;hpb=1922df201003b8736579aed70148a283bb62e33f;p=u-boot diff --git a/include/tpm-v2.h b/include/tpm-v2.h index a9c604dd52..780e061975 100644 --- a/include/tpm-v2.h +++ b/include/tpm-v2.h @@ -80,11 +80,13 @@ enum tpm2_command_codes { TPM2_CC_CLEAR = 0x0126, TPM2_CC_CLEARCONTROL = 0x0127, TPM2_CC_HIERCHANGEAUTH = 0x0129, + TPM2_CC_PCR_SETAUTHPOL = 0x012C, TPM2_CC_DAM_RESET = 0x0139, TPM2_CC_DAM_PARAMETERS = 0x013A, TPM2_CC_GET_CAPABILITY = 0x017A, TPM2_CC_PCR_READ = 0x017E, TPM2_CC_PCR_EXTEND = 0x0182, + TPM2_CC_PCR_SETAUTHVAL = 0x0183, }; /** @@ -134,4 +136,127 @@ enum tpm2_algorithms { */ u32 tpm2_startup(enum tpm2_startup_types mode); +/** + * Issue a TPM2_SelfTest command. + * + * @full_test Asking to perform all tests or only the untested ones + * + * @return code of the operation + */ +u32 tpm2_self_test(enum tpm2_yes_no full_test); + +/** + * Issue a TPM2_Clear command. + * + * @handle Handle + * @pw Password + * @pw_sz Length of the password + * + * @return code of the operation + */ +u32 tpm2_clear(u32 handle, const char *pw, const ssize_t pw_sz); + +/** + * Issue a TPM2_PCR_Extend command. + * + * @index Index of the PCR + * @digest Value representing the event to be recorded + * + * @return code of the operation + */ +u32 tpm2_pcr_extend(u32 index, const uint8_t *digest); + +/** + * Issue a TPM2_PCR_Read command. + * + * @idx Index of the PCR + * @idx_min_sz Minimum size in bytes of the pcrSelect array + * @data Output buffer for contents of the named PCR + * @updates Optional out parameter: number of updates for this PCR + * + * @return code of the operation + */ +u32 tpm2_pcr_read(u32 idx, unsigned int idx_min_sz, void *data, + unsigned int *updates); + +/** + * Issue a TPM2_GetCapability command. This implementation is limited + * to query property index that is 4-byte wide. + * + * @capability Partition of capabilities + * @property Further definition of capability, limited to be 4 bytes wide + * @buf Output buffer for capability information + * @prop_count Size of output buffer + * + * @return code of the operation + */ +u32 tpm2_get_capability(u32 capability, u32 property, void *buf, + size_t prop_count); + +/** + * Issue a TPM2_DictionaryAttackLockReset command. + * + * @pw Password + * @pw_sz Length of the password + * + * @return code of the operation + */ +u32 tpm2_dam_reset(const char *pw, const ssize_t pw_sz); + +/** + * Issue a TPM2_DictionaryAttackParameters command. + * + * @pw Password + * @pw_sz Length of the password + * @max_tries Count of authorizations before lockout + * @recovery_time Time before decrementation of the failure count + * @lockout_recovery Time to wait after a lockout + * + * @return code of the operation + */ +u32 tpm2_dam_parameters(const char *pw, const ssize_t pw_sz, + unsigned int max_tries, unsigned int recovery_time, + unsigned int lockout_recovery); + +/** + * Issue a TPM2_HierarchyChangeAuth command. + * + * @handle Handle + * @newpw New password + * @newpw_sz Length of the new password + * @oldpw Old password + * @oldpw_sz Length of the old password + * + * @return code of the operation + */ +int tpm2_change_auth(u32 handle, const char *newpw, const ssize_t newpw_sz, + const char *oldpw, const ssize_t oldpw_sz); + +/** + * Issue a TPM_PCR_SetAuthPolicy command. + * + * @pw Platform password + * @pw_sz Length of the password + * @index Index of the PCR + * @digest New key to access the PCR + * + * @return code of the operation + */ +u32 tpm2_pcr_setauthpolicy(const char *pw, const ssize_t pw_sz, u32 index, + const char *key); + +/** + * Issue a TPM_PCR_SetAuthValue command. + * + * @pw Platform password + * @pw_sz Length of the password + * @index Index of the PCR + * @digest New key to access the PCR + * @key_sz Length of the new key + * + * @return code of the operation + */ +u32 tpm2_pcr_setauthvalue(const char *pw, const ssize_t pw_sz, u32 index, + const char *key, const ssize_t key_sz); + #endif /* __TPM_V2_H */