X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fvsc9953.h;h=a2d4554c3bbe0b1d8e0d88da2a3b16187be0823b;hb=77511b3b4be449f1547cd97ec6dde780ef589d84;hp=df1c709523df1052f3669a544df888a022d57fd2;hpb=22449858f8eae3f03399f76b4a982dd2f0d4df00;p=u-boot

diff --git a/include/vsc9953.h b/include/vsc9953.h
index df1c709523..a2d4554c3b 100644
--- a/include/vsc9953.h
+++ b/include/vsc9953.h
@@ -1,14 +1,9 @@
 /*
- *  vsc9953.h
+ * Copyright 2013, 2015 Freescale Semiconductor, Inc.
  *
- *  Driver for the Vitesse VSC9953 L2 Switch
- *
- *  This software may be used and distributed according to the
- *  terms of the GNU Public License, Version 2, incorporated
- *  herein by reference.
- *
- * Copyright 2013  Freescale Semiconductor, Inc.
+ * SPDX-License-Identifier:      GPL-2.0+
  *
+ * Driver for the Vitesse VSC9953 L2 Switch
  */
 
 #ifndef _VSC9953_H_
@@ -108,6 +103,8 @@
 /* Macros for vsc9953_ana_port.vlan_cfg register */
 #define VSC9953_VLAN_CFG_AWARE_ENA	0x00100000
 #define VSC9953_VLAN_CFG_POP_CNT_MASK	0x000c0000
+#define VSC9953_VLAN_CFG_POP_CNT_NONE	0x00000000
+#define VSC9953_VLAN_CFG_POP_CNT_ONE	0x00040000
 #define VSC9953_VLAN_CFG_VID_MASK	0x00000fff
 
 /* Macros for vsc9953_rew_port.port_vlan_cfg register */
@@ -129,19 +126,27 @@
 #define VSC9953_PORT_CFG_LEARN_AUTO	0x00000100
 #define VSC9953_PORT_CFG_LEARN_CPU	0x00000200
 #define VSC9953_PORT_CFG_LEARN_DROP	0x00000400
+#define VSC9953_PORT_CFG_PORTID_MASK	0x0000003c
 
 /* Macros for vsc9953_qsys_sys.switch_port_mode register */
 #define VSC9953_PORT_ENA		0x00002000
 
+/* Macros for vsc9953_ana_ana.agen_ctrl register */
+#define VSC9953_FID_MASK_ALL		0x00fff000
+
 /* Macros for vsc9953_ana_ana.adv_learn register */
 #define VSC9953_VLAN_CHK		0x00000400
 
+/* Macros for vsc9953_ana_ana.auto_age register */
+#define VSC9953_AUTOAGE_PERIOD_MASK	0x001ffffe
+
 /* Macros for vsc9953_rew_port.port_tag_cfg register */
 #define VSC9953_TAG_CFG_MASK		0x00000180
 #define VSC9953_TAG_CFG_NONE		0x00000000
 #define VSC9953_TAG_CFG_ALL_BUT_PVID_ZERO	0x00000080
 #define VSC9953_TAG_CFG_ALL_BUT_ZERO		0x00000100
 #define VSC9953_TAG_CFG_ALL		0x00000180
+#define VSC9953_TAG_VID_PVID		0x00000010
 
 /* Macros for vsc9953_ana_ana.anag_efil register */
 #define VSC9953_AGE_PORT_EN		0x00080000
@@ -152,6 +157,19 @@
 /* Macros for vsc9953_ana_ana_tables.mach_data register */
 #define VSC9953_MACHDATA_VID_MASK	0x1fff0000
 
+/* Macros for vsc9953_ana_common.aggr_cfg register */
+#define VSC9953_AC_RND_ENA		0x00000080
+#define VSC9953_AC_DMAC_ENA		0x00000040
+#define VSC9953_AC_SMAC_ENA		0x00000020
+#define VSC9953_AC_IP6_LBL_ENA		0x00000010
+#define VSC9953_AC_IP6_TCPUDP_ENA	0x00000008
+#define VSC9953_AC_IP4_SIPDIP_ENA	0x00000004
+#define VSC9953_AC_IP4_TCPUDP_ENA	0x00000002
+#define VSC9953_AC_MASK			0x000000fe
+
+/* Macros for vsc9953_ana_pgid.port_grp_id[] registers */
+#define VSC9953_PGID_PORT_MASK		0x000003ff
+
 #define VSC9953_MAX_PORTS		10
 #define VSC9953_PORT_CHECK(port)	\
 	(((port) < 0 || (port) >= VSC9953_MAX_PORTS) ? 0 : 1)
@@ -163,6 +181,7 @@
 #define VSC9953_MAX_VLAN		4096
 #define VSC9953_VLAN_CHECK(vid)	\
 	(((vid) < 0 || (vid) >= VSC9953_MAX_VLAN) ? 0 : 1)
+#define VSC9953_DEFAULT_AGE_TIME	300
 
 #define DEFAULT_VSC9953_MDIO_NAME	"VSC9953_MDIO0"
 
@@ -234,6 +253,10 @@ struct vsc9953_ana_ana {
 	u32	port_mode[12];
 };
 
+#define PGID_DST_START		0
+#define PGID_AGGR_START		64
+#define PGID_SRC_START		80
+
 struct vsc9953_ana_pgid {
 	u32	port_grp_id[91];
 };
@@ -268,7 +291,7 @@ struct vsc9953_analyzer {
 	struct vsc9953_ana_ana_tables	ana_tables;
 	u32	reserved2[14];
 	struct vsc9953_ana_ana	ana;
-	u32	reserved3[22];
+	u32	reserved3[21];
 	struct vsc9953_ana_pgid	port_id_tbl;
 	u32	reserved4[549];
 	struct vsc9953_ana_pfc	pfc[10];